Fujitsu MB91401 Datasheet page 45

32-bit proprietary microcontroller lsi network security system
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Prelminary
2004.11.12
Interrupt source
DMAC3 (end, error)
DMAC4 (end, error)
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
U-TIMER0
U-TIMER1
Timebase timer overflow
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
System reserved
Delay interrupt source bit
System reserved (Used by REALOS*)
System reserved (Used by REALOS*)
System reserved
System reserved
Interrupt number
Interrupt
Hexa-
level
Decimal
decimal
34
22
ICR18
35
23
ICR19
36
24
ICR20
37
25
ICR21
38
26
ICR22
39
27
ICR23
40
28
ICR24
41
29
ICR25
42
2A
ICR26
43
2B
ICR27
44
2C
ICR28
45
2D
ICR29
46
2E
ICR30
47
2F
ICR31
48
30
ICR32
49
31
ICR33
50
32
ICR34
51
33
ICR35
52
34
ICR36
53
35
ICR37
54
36
ICR38
55
37
ICR39
56
38
ICR40
57
39
ICR41
58
3A
ICR42
59
3B
ICR43
60
3C
ICR44
61
3D
ICR45
62
3E
ICR46
63
3F
ICR47
64
40
65
41
66
42
67
43
MB91401
Address of TBR
Offset
default
374
000FFF74
H
H
370
000FFF70
H
H
36C
000FFF6C
H
H
368
000FFF68
H
H
364
000FFF64
H
H
360
000FFF60
H
H
35C
000FFF5C
H
H
358
000FFF58
H
H
354
000FFF54
H
H
350
000FFF50
H
H
34C
000FFF4C
H
H
348
000FFF48
H
H
344
000FFF44
H
H
340
000FFF40
H
H
33C
000FFF3C
H
H
338
000FFF38
H
H
334
000FFF34
H
H
330
000FFF30
H
H
32C
000FFF2C
H
H
328
000FFF28
H
H
324
000FFF24
H
H
320
000FFF20
H
H
31C
000FFF1C
H
H
318
000FFF18
H
H
314
000FFF14
H
H
310
000FFF10
H
H
30C
000FFF0C
H
H
308
000FFF08
H
H
304
000FFF04
H
H
300
000FFF00
H
H
2FC
000FFEFC
H
H
2F8
000FFEF8
H
H
2F4
000FFEF4
H
H
2F0
000FFEF0
H
H
(Continued)
RN
45

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