National Instruments PC-DIO-24 User Manual page 40

Register-Level Programming
The control word written to the CNFG Register to configure port B for output in mode 1 is
shown as follows. Notice that port B does not have extra input or output lines from port C.
During a mode 1 data write transfer, the status of the handshaking lines and interrupt signals can
be obtained by reading port C. Notice that the bit definitions are different for a write and a read
transfer.
The following are the port C status-word bit definitions for output (port A and port B).
7 6
OBFA* INTEA
Bit Name
7 OBFA*
6 INTEA
5–4 I/O
3 INTRA
2 INTEB
1 OBFB*
0 INTRB
PC-DIO-24 User Manual
7 6 5 4
1 X X X
5 4
I/O I/O INTRA
Description
Output Buffer Full for Port A—Low indicates that the CPU has
written data to port A.
Interrupt Enable Bit for Port A—If this bit is high, interrupts are
enabled from the 82C55A for port A. Controlled by bit set/reset of
PC6.
Input/Output—Extra I/O status line when port A is in mode 1
output.
Interrupt Request Status for Port A—When INTEA is high and
OBFA* is high, this bit is high, indicating that an interrupt request
is asserted.
Interrupt Enable Bit for Port B—If this bit is high, interrupts are
enabled from the 82C55A for port B. Controlled by bit set/reset of
PC2.
Output Buffer Full for Port B—Low indicates that the CPU has
written data out to port B.
Interrupt Request Status for Port B—When INTEB is high and
OBFB* is high, this bit is high, indicating that an interrupt request
is asserted.
4-10
3 2 1 0
X 1 0 X
3 2
INTEB
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Chapter 4
1 0
OBFB* INTRB