Figure 7. Processor Connect State Diagram - AMD Sempron 10 Datasheet

Processor with 256k l2 cache
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31994A —1 August 2004
CONNECT is deasserted by the Northbridge (for a
1
previously sent Halt or Stop Grant special cycle).
Processor receives a wake-up event and must cancel
2
the disconnect request.
3 Deassert PROCRDY and slow down internal clocks.
Processor wake-up event or CONNECT asserted by
4
Northbridge.
5 CLKFWDRST is deasserted by the Northbridge.
Forward clocks start three SYSCLK periods after
6
CLKFWDRST is deasserted.

Figure 7. Processor Connect State Diagram

Chapter 4
AMD Sempron™ Processor Model 10 with 256K L2 Cache Data Sheet
1
2/B
Disconnect
Pending
3/A
Disconnect
Condition
Power Management
Connect
Connect
Pending 2
Connect
Pending 1
4/C
A CLKFWDRST is asserted by the Northbridge.
B Issue a Connect special cycle.*
Return internal clocks to full speed and assert
C
PROCRDY.
Note:
The Connect special cycle is only issued after a
*
processor wake-up event (interrupt or STPCLK#
deassertion) occurs. If the AMD Athlon™ system
bus is connected so the Northbridge can probe the
processor, a Connect special cycle is not issued at
that time (it is only issued after a subsequent
processor wake-up event).
6/B
5
Action
17

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