Icom IC-211 Instruction Manual page 28

| SECTION ми THEORY OF OPERATION
OUTLINE
The 1C-211 employs a digital phase locked loop (PLL) circuit as the local oscillator for both
transmit and receive. The output of the PLL circuit is approximately 10.7MHz below the
receive frequency, thereby spurious is kept to a minimum.
The frequency is determined as follows. A pulse generated by the optical chopper circuit,
located at the tuning knob, is digitalized by the Up/Down counter in the LSI (ICOM's custom
developed Large Scale Integrated circuit) and used to control.a programmable divider, also
located inside the LSI chip. The programmable divider controls the PLL circuit which
determines the output frequency of the VCO (Voltage Controlled Oscillator).
In the receiver section, signals from the antenna are mixed with the local oscillator output
from the PLL circuit. The signals are amplified then detected to become audio signals,
amplified again and sent to the speaker.
in the USB and LSB modes, the transmitter uses a carrier of 10.6985MHz for USB and
10.7015MHz for LSB. The carrier and the voice sígnal are sent to a balanced modulator
where the DSB suppressed carrier signal is generated. The unwanted sideband is removed by
a crystal filter, and an SSB signal of 10.700MHz is obtained.
In the CW mode, the set uses the carrier for USB which is shifted about +800Hz. Thiscarrier
passes through the balanced modulator by unbalancing it and then through the crystal filter.
Іп the FM mode, the set uses another crystal oscillator to produce the 10.700MHz signals
which are direct-frequency modulated.
The SSB, CW or FM signal is mixed with the local oscillator output from the PLL circuit,
which is the same as that of the receiver section, and then amplified, filtered, and sent to
the antenna.
RECEIVER CIRCUITS
1. RF AMPLIFIER CIRCUIT
A signal from the antenna is passed through the ALC and filter circuits and applied to
the antenna switching circuit located on main unit. During reception, O48, the antenna
switching transistor, is ON, thus forward biasing D21, D22 and D60. The incoming
signal passes through these diodes, then is fed to an RF amplifier O47, a dual gate MOS
FET.
The incomming signal is fed to the first gate, and AGC voltage is fed to the second gate
to increase the dynamic range of the amplifier. The signal is then passed through the
five-stage helical cavity filter which reduces interferences and inter modulation from
nearby strong signals.
2. MIXER CIRCUIT
From the helical cavity filter, the signal is fed to a mixer, composed of O46, where it is
mixed with the local oscillator signal from the VCO. From the mixer, the resultant
10.700MHz IF signal passes through a monolythic filter, having a bandwidth of 20KHz,
and to the diode switches D40 and D42. In the FM mode, D40 is ON and the IF signal
is fed to FM IF circuit, and in the SSB mode, D42 is ON and the IF signal is fed to SSB
IF circuit.
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