Afio Register Description - Holtek HT32 MCU User Manual

AFIO Register Description

This chapter will introducethe HT32 MCU AFIO registers. Since different MCUs may have
different specifications and the available register resources might also differ, the following
explanation of the AFIO registers is based on the HT32F52352 specification as an example.
Register
Descriptions
Bitmap
Bits
Field
Descriptions
Register
Descriptions
Bitmap
Bits
Field
Descriptions
AN0681EN V1.00
ESSRx Register (EXTI Source Selection Register x, x = 0 or 1)
This register specifies the I/O selection of EXTIn
(x=0, specifies EXTI0 ~ EXTI7x=1, specifies EXTI8 ~ EXTI15)
[31:0]
EXTInPIN[3:0]
EXTIn Pin Selection (n=0~15)
0000: PA Bit n is selected as EXTIn source signal
0001: PB Bit n is selected as EXTIn source signal
0010: PC Bit n is selected as EXTIn source signal
0011: PD Bit n is selected as EXTIn source signal
Others: Reserved
Note: Since not all GPIO pins are available in all products and package types, refer to the datasheet
pin assignment section for detailed pin information. The EXTInPIN[3:0] field setting is invalid
when the corresponding pin is not available.
Table 42. ESSRx Register
GPxCFGLR/GPxCFGHR Register (GPIO x Configuration Register, x = A, B, C, etc.)
This register specifies the alternate function of GPIO Port x Pin n (n=0~15)
(where GPxCFGLR specifies pins 0 to 7 and GPxCFGHR specifies pins 8 to 15)
[31:0]
PxCFGn[3:0]
Port x Pin n Alternate function selection (n=0~15)
0000: Port x pin n is selected as AF0.
0001: Port x pin n is selected as AF1.
...
1110: Port x pin n is selected as AF14
1111: Port x pin n is selected as AF15
Note: If the pin is selected as an unavailable item which is noted as "N/A" item in the
"Alternate Function Mapping" table in the device datasheet, this pin will be defined as the default
alternate function(AF0).
Table 43. GPxCFGR register (GPxCFGLR, GPxCFGHR)
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HT32 MCU GPIO User's Guide
September 6, 2024