DIGITAL-LOGIC AG
4.6.6
Setup for the TEXAS SLC/2 CPU with 50MHz
Introduction:
The TI486 Microprocessor Setup Program provides the enable/disable function for the clock doubler
and the internal cache.
Enabling the clock doubler and internal cache:
Enter the BIOS-Setup.
Use <Page down> to get to the page „TI 486SLC Control".
Set all options as follows:
First 64k:
A000-F000:
A20M input:
486SLC Cache (KEN):
FLUSH input:
Flush Cache on Hold:
486SLC CPU Clockdoubler:
SUSPEND Pins:
RPL Pins:
Block 1 Starting Address:
Block 1 Size:
Block 2 Starting Address:
Block 2 Size:
Remark:
Setup-Field
486SLC Cache (KEN)::
Enable
Disable:
ATTENTION:
Non-Cacheable
Non-Cacheable
Disabled
Disabled
Enabled
Disabled
50MHz (Cxin = 25MHz double )
Disabled
Disabled
000000
Disabled
000000
Disabled
CYRIX, AMD
TI486SLC/E
not supported
not supported
The temperature of the CPU increases much
faster when used in double clock function!
27
MSM486V Manual V3.22
This Bit switches on the Cache.
This Bit switches on the clock doubler on the
TI486SXLC-2 .
Thereby an area can be possibly excluded.
Thereby an area can be possibly excluded.
Texas Instruments:
TI486SXLC-2
clock doubler on
clock doubler off
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