Numeric Coprocessor; Dram Memory (On Piggy-Pack Module); Interface; Keyboard At Compatible - DIGITAL-LOGIC MICROSPACE PC/104 Technical User's Manual

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bler function and the internal cache memory on the TEXAS CPU: 486SLC2-50MHz. At power-on the
default frequency of the processor is 25 MHz. If both programs are needed, for enabling double clock
and cache, always load first the M5.EXE before the TI486SXL.EXE cache enabler from Cyrix.
ATTENTION:
To start M5.EXE (the M5.CFG must reside on the same directory as the M5.EXE) and TI486SLX.EXE
use:
4.2.2

Numeric Coprocessor

If the Cy87 is soldered, the Numeric Coprocessor is available.
4.2.3

DRAM Memory (on piggy-pack module)

Speed:
Size:
Bits:
Capacity:
Banks:
4.3

Interface

4.3.1

Keyboard AT compatible

AT-keyboard needed.
These signals are available on the utility connector (J5).
J5 Pin
Pin 1
Pin 3
Pin 5
Pin 7
Pin 9
Due to the Texas-CPU 486SLC2-50 MHz includes a 8 KBytes cache
memory, performance-test programs like "LANDMARK" will interpret the
TI486SLC2-50 MHz as a DX-processor and hence calculate relatively
bad performance results (compared to a DX-CPU)!
M5 Q M5.CFG [ENTER]
TI486SXL D+ [ENTER]
70ns
piggy-pack Module MSMRAM
16 Bit
0.5, 1, 2, 4, 8 MBytes (needs to be selected via jumper)
2
KBCLK =
KBDATA =
Signal
= Speaker Out
= Reset In
= Keyboard Data
= Ground
= PS/2 Mouse Clock
Clock signal for the AT-keyboard
Data signal for the AT-keyboard
Pin Signal
Pin 2 = Ground
Pin 4 = VCC
Pin 6 = Keyboard Clock
Pin 8 = Ext. Battery
Pin10 = PS/2 Mouse Data
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MSM486V Manual V3.22