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Evaluation Module Overview
1 Evaluation Module Overview
1.1 Introduction
The LMX1214 EVM is an ultra-low additive-jitter RF buffer and divider. The device can buffer RF frequencies up
to 16GHz and divide outputs by up to 6.4GHz. A separate auxiliary clock divider can be used for FPGAs or other
logic ICs. The device runs from a single 2.5V supply, and is programmed by a digital SPI from a 1.8V, 2.5V, or
3.3V bus controller.
The EVM can be operated with a 3.3V supply voltage when the onboard LDO is utilized. The LDO can be
bypassed, in this case the supply voltage is 2.5V. The EVM contains LMX1214, one LDO, a microcontroller and
an IO expander.
1.2 Kit Contents
Included within each evaluation kit is:
•
One LMX1214EVM board (DC302) with integrated USB2ANY controller
•
One micro USB cable
1.3 Specification
Parameter
Supply voltage
(VCCIN SMA)
Supply current
Input clock frequency
1.4 Device Information
The high-frequency capability and extremely low jitter of this device makes a great design to clock precision,
high-frequency data converters without degradation to the signal-to-noise ratio. LMX1214 contains four high-
frequency clock outputs and an additional AUXCLK output with a larger divider range than all clock outputs.
Having the jitter of the clock be less than the aperture jitter of the data converter is critical. In applications where
more than four data converters must be clocked, a variety of cascading architectures can be developed using
multiple devices to distribute all the high-frequency clocks required. With low jitter and noise floor, this device
combined with an ultra-low noise reference clock source is an exemplary design for clocking data converters,
especially when sampling above 3GHz.
2
LMX1214 Evaluation Module
Table 1-1. LMX1214 EVM Specification
Value
3.1V to 3.5V
700mA max
300MHz to 16GHz
300MHz to 12.8GHz
Copyright © 2024 Texas Instruments Incorporated
Conditions
On-board voltage regulator outputs are 2.5V
Various configurations
Buffer mode
Divider mode
www.ti.com
SNAU299 – JANUARY 2024
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