Toshiba TLCS-900/H1 Series Manual page 58
Original cmos 32-bit microcontroller
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(3) SDRAM burst read timing (Start of burst cycle)
SDCLK
SDxxDQM
SDCS
SDRAS
SDCAS
SDWE
A1 to A11 or
A1 to A10
A12 or A11
A13 to A15 or
A12 to A15
D0 to D31
t
CK
t
t
RP
RCD
t
t
CMS
CMH
t
CMH
t
t
t
t
AH
AH
AS
AS
227
Row
Row
0
Row
92CH21-475
t
CMS
t
t
CMS
CMH
t
AS
Column
Column
t
AC
TMP92CH21
t
t
AC
AC
Data input
Data input
t
t
OH
OH
2006-09-15
Data input
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