Toshiba TLCS-900/H1 Series Manual page 5
Original cmos 32-bit microcontroller
Hide thumbs
Also See for TLCS-900/H1 Series:
Table of Contents
Advertisement
(16) Touch screen interface
•
Available to reduce external components
(17) Watchdog timer
(18) Melody/alarm generator
•
Melody: Output of clock 4 to 5461 Hz
•
Alarm: Output of 8 kinds of alarm pattern and 5 kinds of interval interrupt
(19) MMU
•
Expandable up to 512 Mbytes (3 local area/8 bank method)
•
Independent bank for each program, read data, write data and LCD display data
(20) Interrupts: 50 interrupt
•
9 CPU interrupts:
•
34 internal interrupts: Seven selectable priority levels
•
7 external interrupts: Seven selectable priority levels (6-edge selectable)
(21) Input/output ports: 82 pins (Except Data bus (16bit), Address bus (24bit) and
(22) NAND flash interface: 2 channels
•
Direct NAND flash connection capability
•
ECC calculation (for SLC- type)
(23) Stand-by function
•
Three HALT modes: IDLE2 (programmable), IDLE1, STOP
•
Each pin status programmable for stand-by mode
(24) Triple-clock controller
•
Clock doubler (PLL) supplies 48 MHz for USB, 36 MHz system-clock for others
•
Clock gear function: Select high-frequency clock fc to fc/16
•
RTC (fs = 32.768 kHz)
(25) Operating voltage:
•
VCC = 3.0 V to 3.6 V (fc max = 40 MHz)
•
VCC = 2.7 V to 3.6 V (fc max = 27 MHz)
(26) Package:
•
144-pin QFP (P-LQFP144 -1616-0.40C)
•
144-pin chip form is also available. For details, contact your local Toshiba sales
representative.
Software interrupt instruction and illegal instruction
92CH21-3
TMP92CH21
pin)
RD
2006-09-15
Advertisement
Table of Contents
