Tektronix 442 Service Manual page 67

Theory of Operation—442 Service
Components C4396, R4396, C4397, C4395, R4397,
C4398, and R4398 provide compensation (peaking) to
correct for delay line losses.
Delay Line
Delay Line DL4380 provides approximately 140 ns
delay for the vertical signals. This allows the sweep
generator circuit to initiate a sweep before any vertical
signal reaches the crt vertical deflection plates.
Vertical Switching
The Vertical Switching circuit determines when
Channel 1 or Channel 2is connected tothe vertical output
amplifier. In ALTernate or CHOPped mode, both channels
are displayed on a time shared basis.
When the Vertical Mode switch is set for CH 1 (CH 1
pushbutton in), pin 4 of U4324A is held LO. Since pin 1 is
HI, this causes pin5to go Hl. AHI at pin 5 (a voltage higher
than at the bases of Q4386 and Q4376) reverse biases
CR4347 and CR4348 and forward biases CR4346 and
CR4349. This allows Channel 1 signals to pass tothe delay
line driver. When pin 5 is HI, pin 6 is LO causing the
cathodes of CR4357 and CR4358 to connect to a voltage
much lower than on the bases of Q4386 and Q4376.
Diodes CR4357 and CR4348 are now forward biased and
diodes CR4356 and CR4359 are reverse biased, preven-
ting Channel 2 signals from passing through to the delay
line driver.
In Channel 2 mode, the above conditions are reversed.
In ALTernate or CHOPped Vertical Mode, Channel 1
and Channel 2 are alternately connected to the delay line
driver. The setting of the SEC/DIV switch should be
considered
when selection of ALT or CHOP
mode is
made. CHOP should be used with sweep speeds of 1 ms
and slower and ALT should be used with sweep speeds of
.5 ms and faster.
In the chopped mode, pin 2 of U4306A is ungrounded
by the Vertical Mode push-button switching, allowing the
multivibrator (U4306A and U4306D) to free run at about
250 kHz. The output at pin 8 of U4306C serves as a clock
pulse for U4324A, which in turn switches the channel
diode gates at the 250 kHz rate. Theclock pulseis alsofed
to U4324B, which provides an output pulse to the Z-axis
amplifier to blank out the transition between Channel 1
and Channel 2 traces. If pin 13 of U4324B goes LO, the
output (pin 9) is set LO, causing pin 6 of U4306B to go HI.
This causes pin 13 of U4324A to go HI after being delayed
by C4315 charging through R4315. The clock pulse
applied to pin 11 of U4324B causes pin 9to go HI which, in
turn (through the inverter and after some delay), sets pin
13 LO again. This causes pin 9 to go LO again. The
positive-going voltage pulse (whose width is determined
by R4315 and C4315) is converted to current by R4318 and
sent to the Zaxis amplifier to blank out switching
transients.
Inthe alternate mode, pin 2 of U4306A is grounded by
the Vertical Mode push-button switching, preventing
multivibrator operation and keeping pin 10 of U4306C HI.
At the end of each sweep, the base of Q4302 receives a
current pulse that drives it into saturation. The resulting
negative-going pulse at the collector is fed through C4302
to pin 9 of U4306C, causing pin 8 to go Hi. This, in turn,
switches U4324A to pass either Channel 1 or Channel 2to
the delay line driver at the end of each sweep. Pin 12 of
' U4324B is grounded through the Vertical Mode switching
and prevents any output at pin 9.
The Vertical Mode switching also selects appropriate
triggering sources for Channel 1 and Channel 2. With the
Vertical Mode switching set to CH 1, ALT, or CHOP,
CR4335 is forward biased and signals from Channel 1
trigger pickoff go to the sweep circuit. In these modes,
CR4331 is connected to +8 volts, thus reverse biasing
CR4336 and preventing Channel 2 trigger signals from
entering the trigger input amplifier. With the Vertical Mode
switching set to CH 2, CR4336 becomes forward biased
while CR4331 is reverse biased because CR4332 is now
connected to +8 volts. Channel 2 triggering may be used
with ALT, CHOP, or DIFF by pressing CH 2 and ALT,
CHOP, or DIFF push-buttons simultaneously.
REV A MAY 1980