Keithley 486 Instruction Manual page 173

SECTION 7
Maintenance
Table 7-7.
Analog Circuitry Checks
Step
-
1
2
3
4
5
6
7
i
10
11
12
13
::
16
17
18
19
20
21
22
23
24
25
-
Itt?m/Component Required Condition ReIlI.Wk.9
Front panel controls
Initial conditions
Reference point
zero correct
u142, pin 6
U146, pin 6
ANALOG OUTPUT
IN-PUT iack
Ul42, pk 6
Ul46, pin 6
ANALOG OUTPUT
NEWT jack
U142, pin 6
U146, pin 6
ANALOG OUTPUT
Repeat steps 7-14 for
listed inputs
Range: Auto; Filter: Enabled &mlog+DigitaI);
Zero Checkz Enabled
Connect Dh4M LO or scope LO to analog corn-
n-loll unpI.lt low)
Press SHIFT CORRECT
ov snv
ov *1mv
ov flmV
Apply +1.OOOOOmA and disable zero check
-1.2v
-lv
+1v
Apply -1 .OOOO&nA
+1.2v
+lV
-lv
Input
+1oo.ooouA
~10.coo0~
+1.oc5oopA
+1oo.ooonA
z%lo.owonA
*1.0oxl0nA
Apply +l.OOOOOmA
Place unit in A/D REF test mode (see para-
graph 7.7.4)
+2.8V
Place unit in A/D ZERO test mode
All voltages referenced to analog
common
zero correct unit
Input op amp output
Input filter output
Instrument output
Positive current input
Input op amp output
Input amplifier output
In.sinlment output
Negative current input
Input op amp output
Input ampl&r output
Instrument output
AU measured voltages should be
*lV at:
Ul42, pin 6
U146, pin 6
ANALOG OUTPUT
INPUT jack
A/D test mode
(DEBUG)
TN05
A/D Test mode
(DEBUG)
Tmo5
A/D test mode
(DEBUG)
rP105
Normal
operation
rr102
LJl29, pin 13
MUX set at REF
MUX at REF
ov
MUX at ZERO
Place unit in A/D SIG test mode
-lv
MUX at SIGNAL
Exit A/D test mode
See Figure 7-6
Variable
pulse train
(OV to sv)
htegration output
A/D counts
7-16