Display Sequencing; Display Timing Generationi - Facit 4431 Service Instruction

so mm:
040 PIN N0fY1BER
ASCII BIT (DMO)
D41-9 8 (A1)
ASCII BIT (DM1) D41-6 7 (A2)
ASCII BIT (DM2) D41-5 6 (A4)
ASCII BIT ( DM3)
D41-16 5 (AB)
ASCII BIT (DM4)
D41-15 4 (A16)
ASCII BIT (DM5)
D41-12 3 (A32)
ASCII BIT (DM6)
D46-5 2 (A64)
SCAN LINE 1 ( S1) D18-4 1 (A128)
SCAN LINE 2 (S2) D18-7 22 (A512)
SCAN LINE 3 (S3) D18-9 19 (A1024)
SCAN LINE 4 (S4) D18-12
23 (A256)
Table
Character generator addressing
An example of how a particular character's dot
pattern is stored in the character generator
ROM is illustrated in table below for the let-
ter "A".
SCAN
LINE
0
1
2
3
4
5
6
7
8
9
D40
ADDRESS DATA
041 Hex
OC1
141
1C1
241
2C1
441
4C1
541
5C1
00 Hex
10
28
44
82
AA
82
82
00
00
DOT PATTERN
**
****
** **
** **
********
** **
** **
Table Character Generaetor Data for "A".
7.4.2 DISPLAY SEQUENCING
The character clock period (610nS in the 80 co-
lumn mode and 410nS in the 132 column mode) is
not sufficient to look up the ASCII character in
the refresh memory, to use it as the address for
reading the video data from the character genera
tor D40 and load this data into the video shift
registers D39 and D38. To provide enough time to
accomplish the lookup sequence, the ASCII cha-
racter is read from the screen refresh memory
say at character time 0, during the refresh por-
tion of the memory character cycle (when the
MEMSHARE signal is low). At the end of that half
cycle, the character is latched along with the
attributes associated with that character into
the octal latches D41 and D46.
During character time 1, the sixth dot pulse ge-
nerated in the sync. generation circuitry loads
the character dot information into the video
shift registers D39 and D38. During character
time 2, this information is shifted out for a
particular scan line of the character and is
displayed on the screen.
21
This type of sequencing is rem1n1cent of a buck-
et brigade since the character generator is al-
ways looking up the data for the next character
to be displayed (i.e., it is always one charac-
ter ahead of the video beam) and the display RAM
is accesing data for the second character to be
displayed after the present one (i.e., it is two
charcters ahead of the video beam).
Figure 7.5 illustrates this process. Suppose the
beam is passing through scan line 1 of the let-
ters ABC and the cursor is positioned over the
character C. Assume the shift register is shif-
ting out the second scan line information for
the letter A which is found to be 10 Hex from
Table above (The character generator con-
tents for the second scan lines of letter B and
Care AC and 2C Hex respectively). The sixth dot
pulse generated when the beam finishes scanning
this scan line of the letter A, loads the dot
pattern for the second scan line of the letter B
(AC Hex) into the shift register while simulta-
neously loading the ASCII code for the letter C
(43 Hex) and the associated cursor and attribute
information into the octal latches D41 and D46.
CHARACTER
DISPLAYED
D22-9
SHIFT
REGISTERS
OCTAL
LATCHES
A B
c
AC Hex 2C Hex
43 Hex ASCII of next
and ATTR. character and
information A TTR. information
FIG 7.5 DISPLAY SEQUENCING
When the code 43 Hex appears at the outputs of
the latches along with the cursor and attribute
information, the character generator ROM begins
looking up the dot pattern for the second scan
line of the letter C (2C Hex). This dot pattern
data will be loaded into the shift register when
the beam passes through the sixth dot in the
second scan line of the letter B. Also the ASCII
code for the next character on the screen will
be loaded into the octal latches.
7.4.3 DISPLAY TIMING GENERATION
The-ciisplay-timing-generation-for the videogene-
rator section begins at the sync generator with
the dot oscillator and the sixth half dot jam
pulse. The dot clocks and the jam pulses are
multiplexed in D22 to select one set of signals
for the single or double wide character mode.