Mitsubishi Electric MELSEC iQ-R C Series Programming Manual page 20

Accessing the host CPU
The following table shows the accessible devices when accessing the host module.
: Accessible, : Not accessible
Device
Input relay
Output relay
Internal relay
Special relay
Data register
Special register
Link relay
Link register
File register
Intelligent function module device, module access device
CPU buffer memory
Fixed cycle communication area
Accessing the other CPU
The following table shows the accessible devices when accessing the other CPUs (that is a CPU module and a C Controller
module in a multiple CPU system).
No. Access target CPU
(1) RCPU
(2) R12CCPU-V
: Accessible, : Not accessible
Device
Input relay
Output relay
Latch relay
Internal relay
Special relay
Annunciator
Timer (Contact)
Long timer (Contact)
Timer (Coil)
Long timer (Coil)
Counter (Contact)
Long counter (Contact)
Counter (Coil)
Long counter (Coil)
Timer (Current value)
Long timer (Current value)
Counter (Current value)
Long counter (Current value)
Data register
Special register
Index register
Long index register
1 COMMON ITEMS
18
1.3 MELSEC Data Link Functions
X
Y
M
SM
D
SD
B
W
ZR
Un\G
U3En\G
U3En\HG
Access method
X Batch/random
Y Batch/random
L Batch/random
M Batch/random
SM Batch/random
F Batch/random
T Batch/random
LT Batch/random
T Batch/random
LT Batch/random
C Batch/random
LC Batch/random
C Batch/random
LC Batch/random
T Batch/random
LT Batch/random
C Batch/random
LC Batch/random
D Batch/random
SD Batch/random
Z Batch/random
LZ Batch/random
Access method
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch/random
Batch
Random
Batch
Random
Access target CPU
(1)






















Access
target CPU
R12CCPU-V














(2)





















