Sdram Ras To Cas Delay; Sdram Ras Precharge Time; Sdram Cas Latency Time; Dram Data Integrity Mode - Advantech IPC-610B Manual

3.5.1 SDRAM RAS to CAS Delay

This controls the latency between SDRAM active command and the
read/write command. Leave this on the default setting.

3.5.2 SDRAM RAS Precharge Time

This controls the idle clocks after issuing a precharge command to
SDRAM. Leave this on the default setting.

3.5.3 SDRAM CAS Latency Time

This controls the latency between SDRAM read command and the
time that the data actually becomes available. Leave this on the default
setting.

3.5.4 DRAM Data Integrity Mode

"Non-ECC" has byte-wise write capability but no provision for
protecting data integrity in the memory module array. "EC-Only" data
errors are detected but not corrected. "ECC" with hardware scrubbing
allows detection of single-bit and multiple-bit errors and recovery of
single-bit errors. The default setting is "Non-ECC."

3.5.5 16 Bit I/O Recovery Time / 8 Bit I/O Recovery

Time
Timing for 16-bit and 8-bit ISA cards respectively. Leave these on their
respective default settings.

3.5.6 Memory Hole At 15M-16M

Enabling this feature reserves 15 MB to 16 MB memory address space
for ISA expansion cards that specifically require this setting. This
makes memory from 15 MB and up unavailable to the system. Expan-
sion cards can only access memory up to 16 MB. The default setting is
"Disabled."
Chapter 3 Award BIOS Setup
4 3
Artisan Scientific - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisan-scientific.com