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PFI Terminal
Filter Clock
(40 MHz)
Filtered Input
NI cDAQ-9172 User Guide and Specifications
You can configure the filter setting for each input independently. On power
up, the filters are disabled. Figure 41 shows an example of a low to high
transition on an input with its filter set to 125 ns (N = 5).
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Enabling filters introduces jitter on the input signal. For the 125 ns and
6.425 µs filter settings, the jitter is up to 25 ns. On the 2.56 ms setting, the
jitter is up to 10.025 µs.
Prescaling
Prescaling allows the counter to count a signal that is faster than the
maximum timebase of the counter. The NI cDAQ-9172 chassis offers
8X and 2X prescaling on each counter (prescaling can be disabled). Each
prescaler consists of a small, simple counter that counts to eight (or two)
and rolls over. This counter can run faster than the larger counters, which
simply count the rollovers of this smaller counter. Thus, the prescaler acts
as a frequency divider on the Source and puts out a frequency that is
one-eighth (or one-half) of what it is accepting.
External Signal
Prescaler Rollover
(Used as Source
by Counter)
Counter Value
Prescaling is intended for frequency measurement where the measurement
is made on a continuous, repetitive signal. The prescaling counter cannot
be read; therefore, you cannot determine how many edges have occurred
since the previous rollover. You can use prescaling for event counting
provided it is acceptable to have an error of up to seven (or one). You can
use prescaling when the counter Source is an external signal. Prescaling
is not available if the counter Source is one of the internal timebases
(80MHzTimebase, 20MHzTimebase, or 100kHzTimebase).
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Figure 41. Filter Example
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Figure 42. Prescaling
70
Filtered input goes high
when terminal is sampled
high on five consecutive
filter clocks.
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