Block Diagram Video - Philips EJ3.0UPA Service Manual

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Video

VIDEO
B02B B03
MAIN TUNER MPIF MAIN:
1T04
TD1336O/FGHP
12 IF-ANA IF-ANA 2
IF-OUT
7T13
MAIN HYBRID LA7795T-E
1T01
14 7
1 7 2
TUNER
IF-1
15 6
14 8 3
IF-2
in out
SAW 44MHz
AGC COTROL
4
FM-T 7T12
13
IF-AGC
+5V
2
4
+5VTUN
B02A CHANNNEL DECODER
7T22
NXT2004
CVBSOUTIF-MAIN
DTV CABLE AND
FAT-IF-AGC
34
TERRESTRIAL
38 AUX-IF-AGC AV1_CVBS
RECEIVER N.C.
8 FAT-ADC-INN
QAM 8VSB
ADC ADC 7 FAT-ADC-INP
Demodulator
FEC
AV2_Y-CVBS
N.C.
FM-TRAP
48
AV2_C
Micro-
N.C.
GPIO
84 IRQ-FE-MAIN
Controller
B05A
QPSK
ADC
Demodulator
29
AV7_Y-CVBS
B07C
1T11
30 25M14
MPEG_DATA
TO
DV1F-DATA(0-7) B05C
VIPER
D
SIDE/REAR FACING SIDE AV
1302
1304 1M36
FRONT_Y_CVBS_IN 2 2 FRONT_Y-CVBS
VIDEO
4 4
FRONT_C
1301
1
3
S VIDEO 5 FRONT_C_IN
4
2
B07C B07E
ANALOG I/O HDMI
1I05
1 ARX2+
3 ARX2-
4 ARX1+
6
ARX1-
7
ARX0+
1I04 9 ARX0-
10 ARXC+
PR1
PR
B07b 12
ARXC-
15
ARX-DCC-SCL
PB1
PB
B07b
16 ARX-DCC-SDA
AV1
Y1
HDMI 19
7C04
Y
B07b
CONNECTOR
HPD-HIRATE
AV7_Y-CVBS
VIDEO
B03a 1I06
IN
1
BRX2+
3 BRX2-
4 BRX1+
1I03
6
BRX1-
PR
7
PR BRX0+
B07b
9 BRX0-
PB
PB 10 BRXC+
AV2 B07b
12
BRXC-
Y
15
Y B07b BRX-DCC-SCL
16 BRX-DCC-SDA
HDMI 19
7C03
CONNECTOR
HPD-HIRATE
H-SYNC-VGA
N.C.
V-SYNC-VGA
N.C.
Y
B07A
Y1
B07A
PR
B07A
PR1
B07A
Y
Y1
PB
B07A
PB1
B07A
EJ3.0U PA
7A00
PNX3000HL
B03C IF B03B
1A10
SUPPLY
107 VIFINP
7
SOUND GROUP
LPF
TRAP DELAY
108
8 VIFINN
SUPPLY
SAW 45MHz
QS S
QSSOUT
99 SIFINP
BPF LPF
DIGITAL
100 SIFINN
BLOCK
TO AM INTERNAL
LPF AUDIO SWITCH
7A11
EF 3A17
CVBSOUTIF
5 120
CVBS-OUTA
B03A
CVBS/Y RIM LPF
SOURCE SELECTION
CVBS-OUTB
C L A M P
C-PRIM
123
CVBS-IF MPIF
126 CVBS1
1
CVBS2
12 CVBS_DTV
STROBE1N 60
A
+
DATA STROBE1P 61
4 CVBS|Y3 D
LPF
LINK
5 C3 1 DATA1N 62
Yyuv
2FH
DATA1P 63
8 CVBS|Y4
9 C4
STROBE3N
15 Y_COMB A STROBE3P
DATA
CLAMP
LINK
D
16 C_COMB
DATA3N
3
2nd
SIF DATA3P
25 R|PR|V_1
CVBS SEC A/D
Yyuv
YUV
26 G|Y|Y_1
2Fh
RGB
A
Yyuv STROBE2N
LEVEL
27 B|PB|U_1
D
ADAPT
U U,V DATA STROBE2P
CLAMP
INV.
30 R|PR|V_2 LINK
A
PAL
V DATA2N
2
31 G|Y|Y_2 D
DATA2P
MONO SEC.
32 B|PB|U_2
CLP PRIM
TIMING
CLP SEC
CIRCUIT
CLP yuv
B07B
HDMI: I/O + CONTROL
7B50
TDA9970HS
7C01
AD8190ACPZ
41 26 RX2+ 180
RX2+A
40 25 RX2- 179
HDMI
RX2-A
38 174
RX1+A
Termination
37 173
Video
RX1-A
resistance
20
35 RX0+ 168 output
RX0+A control
formatter
34 19 RX0- 167
RX0-A
32 162
HDMI
RXC+A
31 161
SWITCH
RXC-1
B05A
VHREF
12 180
RX2+B timing
Upsample
11 179
generator
RX2-B
9 23 174
RX1+
RX1+B Derepeater
Termination
22
8 RX1- 173
RX2-B
resistance
6 168
control
RX0+B
I2C slave
HDMI
5 167
HDCP
RX0-B interface
receiver
3 17 RXC+ 162
RXC+B
2 16 RXC- 161
RXC-B SUPPLY
HSCL B
HSDA B
Line time
B05A
measuremebt
Activity
131
Sync
HSYNC
detection &
128
seperator
VSYNC
sync selec.
90
88
G/Y Slicers
Clocks
96 generator
94 R/PR
81 ADC
79 G/Y
68
B/PB
66
6. 32
B04
PNX 2015:
7J00
PNX2015E
B04F SUPPLY B04C TUNNELBUS
+5V
+1V2
PNX2015
+5VaM
+3V3
+5VTUN
+1V2-STANDBY
+5VbM SUPPLY
+3V3-STANDBY
SCL-DMA North tunnel
44 +2V5
UP-3V3
43 SDA-DMA
PLL-3V3
LVDS-3V3
PLL-1V2
+2V5-DDRPNX
19
N.C.
AUDIO/VIDEO
22 B04A
N.C.
T1 Memory
AVP1_HSYNCFBL1
based scaler
T2
AVP1_HSYNCFBL2
STROBE1N-MAIN R4
AVP1_DLK1SN
STROBE1P-MAIN R3 AVIP-1
AVP1_DLK1SP
R2
DATA1N-MAIN
AVP1_DLK1DN
DATA1P-MAIN R1
AVP1_DLK1DP
50 STROBE3N-MAIN
N4 AVP1_DLK3SN
COLUMBUS
51 STROBE3P-MAIN N3
AVP1_DLK3SP
3D Comb
52 DATA3N-MAIN N2 filter and
AVP1_DLK3DN
noice
53
DATA3P-MAIN N1 reduction
AVP1_DLK3DP
55 STROBE2N-MAIN P4
AVP1_DLK2SN
AVIP-2
56 STROBE2P-MAIN P3
AVP1_DLK2SP
57 DATA2N-MAIN
P2 AVP1_DLK2DN
123 DATA2P-MAIN P1
AVP1_DLK2DP
HV-PRM-MAIN M3
46
AVP1_HVINFO1
40 CLK-MPIF M4
MPIF_CLK
AV2_FBL L2
Video MPEG
AVP2_HSYNCFBL2
N.C.
decoder
AV6_VSYNC G2
AVP2_VSYNC2
N.C.
M1
DV I/O INTERFACE
B04B
DV4_DATA_0 T0 9
DV4-DATA(0-7)
VIP
DV5-DATA(0-7)
DV5_DATA_0 T0 9
2 DV4-CLK AK8
DV4-VALID AH8
3V3-DIG
1 DV-HREF AH9
DV-HREF
201 DV-VREF AJ9
DV-VREF
207 DV-FREF AK9
DV-FREF
142 SDA-MM
143 SCL-MM
+1V8-PLL
+1V8
3V3-DIG
3V3-AVI
+3V3-AVI
B04E PNX 2015: STANDBY
B04E
& CONTROL
STANDBY
7LA7
M25P05
5 SPI-SDO AK10
B04D
SPI-CLK
6 AH10
512K STANDBY
DDR INTERFACE
1 SPI-CSB AG10 PROCESSOR
FLASH
3 SPI-WP AJ27
See
Block digram
Control
AJ12
1LA0
16M
AH12
B05
VIPER:
7V00
PNX8550
B05C B05B
MAIN MEMORY
TUNNELBUS
TUN-VIPER-RX-DATA
VIPER
TUN-VIPER-TX-DATA
Tunnel Memory
South tunnel
controller
TUN-VIPER-RX-CLKP
TUN-VIPER-TX-CLKN
TUN-VIPER-TX-CLKP
DVD
CSS
B05C
2D DE
AUDIO/VIDEO
Temporal
2-Layer
noise redux
secondary
VO-2 video out
B05D
SUPPLY
Dual SD
DV2A-CLK
AF30 AH19
DV2_CLK single HD
DV3F-CLK SUPPLY
AK28 AG25
MPE2 decoder
DV3_CLK
250Mhz
From
MIPS32
B02A
CPU C4
CHANNEL
DECODER B05A
Scaler and
CONTROL
A2
de-interlacer
MUX
DV1_DATA(0-9)
DV1F-DATA(0-7)
1SD+1HD
YUV
5 Layer
Video Video in
primary
TS
DV2_DATA(0-9)
video out
router
HD/VGA/
Dual
656
con
acces
DV3_DATA(0-9) DV3F-DATA (0-7)
J29 MP-OUT-HS MP-HS
RGB_HSYNC
VO-1
J28 MP-OUT-VS MP-VS
RGB_VSYNC
J30 MP-CLKOUT MP-CLK
RGB_CLK_IN
J27 MP-OUT-FFIELD MP-FF
RGB_UD
MP-OUT-DE MP-DE
K26
RGB_DE
RIN (0-9) MP-ROUT(0-9) MP-R(0-7)
GIN (0-9) MP-GOUT(0-9) MP-G(0-7)
BIN (0-9) MP-BOUT(0-9) MP-B(0-7)
B04G VIPER/PNX 2015: M4 INTER-
DISPLAY INTERFACE CONNECTION
1P06 1405
VDISP +12V_SSB
1 1
3 3
5 5
7 7
LVDS_TX
TXPNXA- 2 2 1407 TxB0-
B26 5J50
LVDS_AN
C26 TXPNXA+ 4 4 TxB0+
LVDS_AP
A25 TXPNXB- 5J52 6 6 1409 TxB1-
LVDS_BN
TXPNXB+ 8 8 TxB1+
B25
LVDS_BP
D25 TXPNXC- 5J54 12 12 1411 TxB2-
LVDS_CN
TXPNXC+ 14 14 TxB2+
E25
LVDS_CP
5J56 18 18 1413
C23 TXPNXCLK- TxBCLK-
LVDS_CLKN
D23 TXPNXCLK+ 20 20 TxBCLK+
LVDS_CLKP
TXPNXD- 5J58 24 24 1415 TxB3-
B24
LVDS_DN
26 26
C24 TXPNXD+ TxB3+
LVDS_DP
28 28
E24 TXPNXE- 5J60
LVDS_EN
F24 TXPNXE+ 30 30
LVDS_EP
27 27
SCL-I2C4 SCL-SSB
29 29
SDA-I2C4 SDA-SSB
7L50
K4D261638K
PMX-MA(0-12)
PMX-MA
DDR
Memory
PNX-MDATA SDRAM
controller PNX-MDATA
(0-15)
128Mx16
A17 PNX-MCLK-P 45
MCLK_P
A16 PNX-MCLK-N 46
MCLK_N
B05B
VIPER: MAIN MEMORY
7V01
K4D551638F
DDR
(0-12)
SDRAM 1
8Mx16
MM_DATA(0-15)
7V02
K4D551638F
DDR
MM_A(0-12)
SDRAM 2
8Mx16
(16-31)
+1V2
+3V3
+2V5-VPR
B06 DISPLAY INTERFACE: MOP
7G00
1H00
XC3S200-4TQG144C
27M
DV-ROUT(0-9)
MOP
DV-GOUT(0-9)
PICTURE ENHANCEMENT
DV-BOUT(0-9)
59
60
55
57
56
M2 PACIFIC 3 M4 INTER-
CONNECTION
1406
7202
1
T6TF4AFG +VDISP
3
5
7
PACIFIC3
28 93 TxoA- 2
1408
29 PICTURE 92 TxoA+ 4
ENHANCEMENT
31 96 TxoB- 6
1410
32 95 TxoB+ 8
34 99 TxoC- 12
1412
35 98 TxoC+ 14
18
38 101 TxoCLK- 1414
37 100 TxoCLK+ 20
40 103 TxoD- 24
1416
26
41 102 TxoD+
28
30
200 198
3xxx
27
SCL-DISP
3xxx
29
SDA-DISP
G_16840_024.eps
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