Circuit Descriptions, Abbreviation List, And Ic Data Sheets - Philips EJ3.0UPA Service Manual

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Circuit Descriptions, Abbreviation List, and IC Data Sheets

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets
Index of this chapter:
9.1 Introduction
9.2 Abbreviation List
9.3 IC Data Sheets
Notes:
Only new circuits (circuits that are not published recently)
are described. For other descriptions see the EL1.1U
manual (3122 785 1629x, where x can be 0 to 9 depending
on the manual version).
Figures can deviate slightly from the actual situation, due
to different set executions.
For a good understanding of the following circuit
descriptions, please use the wiring, block (chapter 6) and
circuit diagrams (chapter 7). Where necessary, you will find
a separate drawing for clarification.
9.1
Introduction
This chassis is specifically developed for ATSC reception
TM
without CableCARD
, and is in fact derived from the EL1.1U
chassis. The key components are:
MPIF (PNX3000).
AVIP/COLUMBUS (PNX2015).
VIPER 2 (PNX8550).
The differences with respect to the EL1.1U chassis are:
Two HDMI connectors (i.o. one).
The presence of the AmbiLight Interconnection Board.
9.1.1
Features
The main features for this chassis are:
The move from the analog world to the digital world. W.o.w.
from signal processing via "hardware circuits" to signal
processing via "software algorithms". This means: no
software = no picture and sound!
Fit for both analog and digital signal processing, this by
converting analog signals into digital transport streams and
allowing seamless zapping between all possible signal
sources. This makes the chassis applicable for e.g.
receiving ATSC in an integrated product form.
The internal digital processing allows new "Multi-Media"
applications such as Content Browser, Memory Card Slot,
Local Area Network support and all kinds of streaming
applications.
The chassis can be upgraded in the future with internal
functionality such as Personal Video Recording, DVD/RW.
9.1.2
Chassis Block Diagram
Description below refers to the block diagrams in chapter 6
"Block Diagrams, Test Point Overview, and Waveforms".
Analog Reception
The TV receives multimedia information by tuning the Hybrid
tuner (for analog and digital reception) to one of many 6 MHz
input channels available via a cable connection. When the
input channel is an analog channel, the signal is processed via
the NTSC decoder and the VBI data decoder of the MPIF.
Digital Reception
The TV receives multimedia information by tuning to one of
many 6 MHz input channels available via a cable connection.
When the input channel is a digital channel, it is processed via
the QAM demodulator and then passed to the multi-media
processor (VIPER), which handles the synchronization and
display of audio-visual material.
EJ3.0U PA
Signal Processing
The AVIP together with the MPIF device is used to perform the
input decoding of a single stream of analog audio and video
broadcast signals. In addition, the AVIP is used for decoding
and presentation of audio output streams. The main data
connection between MPIF and AVIP is done via an I
The AVIP converts the incoming video data to ITU-656 format
for communication to the VIPER IC.
The audio data is transferred between the AVIP and VIPER
2
using I
S.
The AVIP IC is controlled by the VIPER via the I
The key part in the system, the VIPER, performs almost all key
features, like video quality enhancement, motion
compensation, picture-in-picture processing, and others. It is a
completely digital IC with a TriMedia DSP (Digital Signal
Processor) core and a MIPS microcontroller core. The DSP
and some additional cores are used to do the video feature
processing and some auxiliary sound feature processing. The
MIPS microcontroller core is used for all internal and external
controlling tasks including a system wide I
The VIPER provides a primary digital (YUV or RGB) output to
the LVDS transmitter.
AmbiLight Interconnection Board
For further picture enhancement the chassis is equipped with a
so called AmbiLight Interconnect Board. This board provides:
Picture enhancement (Pixel Plus) by the Pacific 3.
AmbiLight control (used in some sets).
Dimming Backlight control.
DC/DC conversion: 12 Volt AmbiLight 15 Volt for AmbiLight
Module supply.
Note: In case no AmbiLight units are installed, no separate
power supply lines are needed for this board. In that case
power is supplied from the Small Signal Board via the LVDS
cable.
Figure 9-1 AmbiLight interconnect board timing diagram
9.
EN 101
2
D bus.
2
C bus.
2
C bus.
G_16840_018.eps
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