Logic Analyzer Connector J17 Pin Assignments - Motorola M68MPB16Z3 User Manual

MEVB SUPPORT INFORMATION
Table 4-10. Logic Analyzer Connector J16 Pin Assignments (continued)
Pin
9
10
11
12
13 – 19
20
Table 4-11. Logic Analyzer Connector J17 Pin Assignments
Pin
1 – 4
5
6
7
8 – 10
4-10
Mnemonic
OC2 OUTPUT COMPARE 2 – Output signal that is
generated when the GPT timer counter (TCNT) and
TOC2 comparator register contain the same value.
OC3 OUTPUT COMPARE 3 – Output signal that is
generated when the GPT timer counter (TCNT) and
TOC3 comparator register contain the same value.
OC4 OUTPUT COMPARE 4 – Output signal that is
generated when the GPT timer counter (TCNT) and
TOC4 comparator register contain the same value.
IC4 / INPUT CAPTURE 4 – Input signal that latches the
contents of the GPT timer counter (TCNT) into the
input capture register TIC4 when a selected edge
occurs at the pin.
OC5 OUTPUT COMPARE 5 – Output signal that is
generated when the GPT timer counter (TCNT) and
TOC5 comparator register contain the same value.
SPARE No connection
GND GROUND
Mnemonic
SPARE No connection
GND GROUND
TXD TRANSMIT DATA – Serial data output line to serial
communication interface.
RXD RECEIVE DATA – Serial data input line to serial
communication interface.
PCS3 – PCS1 QSPI peripheral chip selects
Signal
Signal
M68MPB16Z3UM/D