Notes On Differences Between The Actual Device And The Emulation Adapter - Renesas RTE7702200EAB00000J User Manual

Emulation adapter for the rh850/u2a
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Emulation Adapter
4.2
Notes on Differences between the Actual Device and the Emulation
Adapter
4.2.1
Current Drawn
When the emulation adapter is in use, current drawn may differ from that for the actual device. Thus,
the customer should use the actual device in a final evaluation before mass production and judge the
suitability of adopting the product on that basis.
4.2.2
Oscillator
The emulation adapter does not support clock input from an oscillator on the target system. The main
clock oscillator on the emulation adapter is used as the main clock.
Proceed with final evaluation to confirm operation of the target system after mounting the actual device
and while using the oscillator on the target system.
4.2.3
Power-Supply Voltages
The debug chip mounted on the emulation adapter basically operates with the power supplied from the
target system. However, note that there are differences in the following power-supply voltages.
EMUVDD, DVDD, ERAMVDD, EMUVCC, DVCC, and EMUVCC are generated on the emulation
adapter.
Whether the power-supply voltage generated on the emulation adapter or that for the target system
is used for VDD is selectable by the setting of JP5 on the emulation adapter.
When you use the power supply from the target system, note that transient drops in the power-
supply voltage may occur.
4.2.4
VSS Pins for Each Power-Supply Voltage
AxVSS, SVRAVSS, SVRDRVSS, and VSS are connected to a common GND in the emulation adapter.
4.2.5
AWOVCL and GETH0VCL Pins
Stabilizing capacitors are connected to the stabilizing capacitor connection pins (AWOVCL and
GETH0VCL) on the emulation adapter. These pins are not connected on the target system.
4.2.6
A/D Converter
Results from the A/D converter may differ from those on the actual device because of the exchange
adaptor etc. between the debug chip and the target system.
4.2.7
Emulation of the SVR
The emulation adapter mounts the power-supply IC which is used to generate VDD for the debug chip.
When VDD that has been generated in the SVR circuit on the user system is to be supplied to the
debug chip, short-circuit pins 2-3 of jumper block JP5. Since DCDC_P and DCDC_N signals are
supplied through the exchange adapter and the characteristics of these signals will differ from those of
the signals when the actual device is connected, reviewing the SVR parameters may be required or
operation of the SVR circuit may not be correct.
R20UT4569EJ0110 Rev. 1.10
Sep.15.23
Notes
Page 31 of 58

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