EVAL-AD7928SDZ User Guide
Table 2. Link Options
Link
Default Position
LK1
A
LK2
INSERT
LK3
B
SL1
A
SL2
A
SL3
A
SL4
A
SL5
A
SL6
A
SL7
A
K0-15
DNI
Function
This link is used to select the power supply source for the EVAL-AD7606SDZ.
In Position A, the board is powered with the J1 wall wart connector.
In Position B, The J3 terminal block s the source.
This link is used to supply the SDP power supply form the AD7606SDZ board
Inserted the
EVAL-SDP-CB1Z
LK3 is used to select the VDrive source for the AD7606.
In Position A: The AD7606 is supplied with 3.3V Drive
In Position B, the AD7606 is supplied with 5V VDrive, 5V VDrive is needed to run the device at 200KSPS
in serial interface mode.
In Position A, the CS signal is supplies from the SDP terminal J2.
In Position B, The CS SMB is selected.
In Position A, the SCLK signal is supplies from the SDP terminal J2.
In Position B, The SCLK SMB is selected.
In Position A, the STANDBY signal is supplies from the SDP terminal J2.
In Position B, The STANDBY SMB is selected.
In Position A, the CS signal is supplies from the SDP terminal J2.
In Position B, The CS SMB is selected.
In Position A, the RESET signal is supplies from the SDP terminal J2.
In Position B, The RESET SMB is selected.
In Position A, the CS signal is supplies from the SDP terminal J2.
In Position B, The CS SMB is selected.
In Position A, the CONVST signal is supplies from the SDP terminal J2.
In Position B, The CONVST SMB is selected.
Solder links for bypassing U5 level translator. In the
Rev. PR.A | Page 5 of 13
is powered from the ADP7104 5V linear regulator
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