Clock Multiplying Circuit (Pll) For Fsys; A Pll Setup After Reset Release; The Formula And The Example Of A Setting Of A Pll Multiplication Value - Toshiba TXZ+ TMPM3H Reference Manual

1.2.5. Clock multiplying circuit (PLL) for fsys

The clock multiplying circuit outputs the fPLL clock (up to 120MHz) multiplied by the optimum condition for the
frequency (6MHz to 12MHz) of the output clock fOSC of the high speed oscillator.
So, it is possible to make the input frequency to an oscillator low speed and to make an internal clock high speed
by this circuit.

1.2.5.1. A PLL setup after reset release

The PLL is disabled after reset release.
In order to use the PLL, set [CGPLL0SEL]<PLL0SET> to a multiplication value while [CGPLL0SEL]
<PLL0ON> is "0". Then wait until approximately 100 μs has elapsed as a PLL initial stabilization time, and set
<PLL0ON> to "1" to start PLL operation.
After that, to use fPLL clock which is multiplied fOSC, wait until approximately 400 μs has elapsed as a lock up
time. Then set "1" to [CGPLL0SEL]<PLL0SEL>.
Note that a warm up time is required until PLL operation becomes stable using the warm up function, etc.

1.2.5.2. The formula and the example of a setting of a PLL multiplication value

The details of the items of [CGPLL0SEL]<PLL0SET[23:0]> which set up a PLL multiplication value are shown
below.
The items of PLL0SET
[23:17]
[16:14]
[13:12]
[11:8]
[7:0]
Note: A multiplication value is the total of <PLL0SET[7:0]> (integer part) and <PLL0SET[11:8]> (fraction
part).
Table 1.1 Details of a [CGPLL0SEL]<PLL0SET[23:0]> setup
Correction value
setting
f setting
OSC
Dividing setting
Fraction part
Multiplication setting
Integer part
Multiplication setting
Clock Control and Operation Mode
Function
The quotient of f /450k (integer). For detail refer to Table 1.2
OSC
000: 6 ≤ f ≤ 7
OSC
≤ 8
001: 7 < f
OSC
≤ 10
010: 8 < f
OSC
≤ 12
011: 10 < f
OSC
(Unit: MHz)
00: Reserved
01: 2 dividing (× 1 / 2)
10: 4 dividing (× 1 / 4)
11: 8 dividing (× 1 / 8)
0000: 0.0000
0001: 0.0625
0010: 0.1250
0011: 0.1875
0100: 0.2500
0101: 0.3125
0110: 0.3750
0111: 0.4375
0x00: 0
0x01: 1
0x02: 2
:
0xFD: 253
0xFE: 254
0xFF: 255
15 / 71
TXZ+ Family
TMPM3H Group(2)
≤ 15
100: 12 < f
OSC
≤ 19
101: 15 < f
OSC
≤ 24
110: 19 < f
OSC
111: Reserved
1000: 0.5000
1001: 0.5625
1010: 0.6250
1011: 0.6875
1100: 0.7500
1101: 0.8125
1110: 0.8750
1111: 0.9375
2023-04-28
Rev. 1.0