Toshiba TXZ+ TMPM3H Reference Manual page 30

32-bit risc microcontroller
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Released by an interrupt request
When interrupt releases a Low Power Consumption mode, it is necessary to prepare so that interrupt may be
detected by CPU. The interrupt used for release STOP1 or STOP2 mode needs to set for detecting the
interrupt by INTIF other than a setting of CPU.
Released by Non-Maskable Interrupt (NMI)
The factor of NMIs are WDT interrupt (INTWDT, protected mode A only) and LVD interrupt (INTLVD).
Released by reset
The reset can perform release from all the Low Power Consumption modes.
When released by reset, all the registers will be initialized in NORMAL mode after release.
Released by SysTick interrupt
SysTick interrupt is available only in IDLE mode.
Refer to "Interrupt" chapter of the reference manual "Exception" about the details of interrupt.
Clock Control and Operation Mode
30 / 71
TXZ+ Family
TMPM3H Group(2)
2023-04-28
Rev. 1.0

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