Example: Analog Channel Scanning Of Voltage Inputs And Streaming Analog Outputs; Digital I/O; Digital Input Scanning - Measurement Computing PCI-2517 User Manual

PCI-2517 User's Guide
When used to generate waveforms, you can clock the D/As in several different modes.
 Internal output scan clock
1 MHz.
External output scan clock (XDPCR)

 Internal input scan pacer clock
input.
External input scan pacer clock (XAPCR)

analog input.
Example: Analog channel scanning of voltage inputs and streaming analog
outputs
The example shown in
clock to the example presented in
Figure 5. Analog channel scan of voltage inputs and streaming analog outputs example
This example updates all DACs and the 16-bits of digital I/O. These updates happen at the same time as the
acquisition pacer clock—also called the input scan clock. All DACs and the 16-bits of pattern digital output are
updated at the beginning of each scan.
Due to the time it takes to shift the digital data out to the DACs, plus the actual settling time of the
digital-to- analog conversion, the DACs actually take up to 4 µs after the start of scan to settle on the updated
value.
The data for the DACs and pattern digital output comes from a PC-based buffer. The data is streamed across the
PCI bus to the PCI-2517 by the DMA.
In this example, the outputs are updated by the input scan clock, but you can also update the DACs and pattern
digital output with the output scan clock—either internally-generated or externally-applied. In this scenario, the
acquisition input scans are not synchronized to the analog outputs or pattern digital outputs.

Digital I/O

Twenty-four TTL-level digital I/O lines are included in each PCI-2517. You can program digital I/O in 8-bit
groups as either inputs or outputs and scan them in several modes (see
access input ports asynchronously from the PC at any time, including when a scanned acquisition is occurring.

Digital input scanning

Digital input ports can be read asynchronously before, during, or after an analog input scan.
: The on-board programmable clock can generate updates ranging from 1 Hz to
: A user-supplied external clock.
: The internal ADC pacer clock can pace both the D/A and the analog
: The external ADC pacer clock can pace both the D/A and the
Figure 5 adds four DACs and a 16-bit digital pattern output paced by the input scan
Figure 4.
"Digital input
12
Functional Details
scanning" below). You can