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S
S
S
UPER
TORAGE
YSTEM 6028R-E1CR12N User's Manual
5-7
Serverboard Details
Figure 5-5. X10DRi-T4+ Layout
UID
LE1
JUIDB1
LAN CTRL
LAN CTRL
JIPMB1
LEDM1
BMC
BIOS
JBAT1
BAR CODE
BIOS
MAC CODE
LICENSE
SAN MAC
JSD1
Intel PCH
SP1
JWD1
JPME2
JBT1
LSI 3108
JS39
T-SGPIO1
SAS CTRL
T-SGPIO2
S-SGPIO1
FANB
Notes
Jumpers not indicated are for test purposes only and should not have their settings
changed.
Note that the PCI slots are enabled when their corresponding processors are in-
stalled. "CPU2 Slot 4" indicates that the second CPU must be installed to the CPU2
socket to enable this PCI slot.
" " indicates the position of pin 1.
The LSI 3108 onboard controller chip in the layout image above is not populated
on the X10DRi-T4+.
The 6038R-E1CR16N comes pre-installed with a Hardware RAID controller installed
in PCI-E slot 3 and a JBOD expansion port installed in PCI-E slot 4.
COM1
IPMI_LAN
VGA
LAN3/4
LAN1/2
USB4/5
(3.0)
USB 0/1
CPU2
CLOSE 1st
OPEN 1st
X10DRC/i-LN4+(-T4+)
SAS CODE
Rev. 1.01
IPMI CODE
CPU1
CLOSE 1st
OPEN 1st
Front CTRL Panel
5-12
X10DRi-T4+ Quick Reference
Jumper
JBT1
JI
C1/JI
C2
2
2
JPB1
JPG1
JPLAN1
JPLAN2
JPME2
JPS1
JWD1
Connector
COM1/COM2
FAN 1-6, A-C
J24
JD1
JF1
JIPMB1
JL1
JPI
C1
2
JPWR1/2
JSD1/JSD2
1
JTPM1
FAN1
JUIDB1
(IPMI) LAN
(I-)SATA 0-5
(S-)SATA 0-3
SAS 0-3, 4-7
Slot1
Slot2
Slot3
Slot4
Slot5
Slot6
S-SGPIO1,
T-SGPIO1/2
Chapter 5: Advanced Serverboard Setup
Description
Default Setting
Clear CMOS
See Section 5-9
SMB to PCI-E Slots
Pins 2-3 (Disabled)
BMC Enable/Disable
Pins 1-2 (Enabled)
VGA Enable/Disable
Pins 1-2 (Enabled)
LAN1/2 Enable/Disable
Pins 1-2 (Enabled)
LAN3/4 Enable/Disable
Pins 1-2 (Enabled)
Manufacture (ME) Mode Select
Pins 1-2 (Normal)
SAS Enable/Disable
Pins 1-2 (Enabled)
Watch Dog Timer
Pins 1-2 (Reset)
Description
Backplane COM Port1/Front Accessible COM2 Header
CPU/System Fan Headers
24-pin ATX Main Power Connector
Speaker/Power LED
Front Panel Control Header
4-pin External BMC I
C Header (for an IPMI Card)
2
Chassis Intrusion Header
Power Supply SMBbus I
C Header
2
8-Pin Power Connectors
SATA DOM (Device on Module) Power Connectors
TPM (Trusted Platform Module)/Port 80 Header
UID (Unit Identification) Button
IPMI_Dedicated LAN support by the ASpeed controller
SATA 3.0 Connectors supported by Intel PCH (I-SATA 0-5)
SATA 3.0 Connectors supported by Intel SCU (S-SATA 0-3)
SAS 3.0 Connections supported by the LSI 3108 controller
(JS39)
PCI-Express 3.0 x8 Slot from CPU2
PCI-Express 3.0 x8 Slot from CPU2
PCI-Express 3.0 x16 Slot from CPU1
PCI-Express 2.0 x4 in x8 Slot from CPU2
PCI-Express 3.0 x16 Slot from CPU2
PCI-Express 3.0 x8 Slot from CPU2
Serial Link General Purpose I/O Headers (T-SGPIO1 for I-SATA0-3,
T-SGPIO2 for I-SATA4/5, S-SGPIO1 for S-SATA0-3)
5-13
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