Table of Contents
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Schematic Diagrams
VGA Frame Buffer B
15,18
D
Sheet 19 of 58
VGA Frame Buffer
B
C
B
A
B - 20 VGA Frame Buffer B
5
4
FBB_CMD[31:0]
15
FBB_CLK1
15
FBB_CLK1#
15
FBB_D[63:32]
U20D
INS284423719
BGA170_MIRR
COMMON
MIRRORED
FBB_D48
x32
x16
FBB_D32
FBB_D49
V4
DQ0
FBB_D33
NC
FBB_D50
V2
DQ1
FBB_D34
NC
FBB_D51
T4
DQ2
FBB_D35
T2
NC
FBB_D52
DQ3
FBB_D36
NC
FBB_D53
N4
DQ4
FBB_D37
N2
NC
FBB_D54
DQ5
FBB_D38
NC
FBB_D55
M4
DQ6
NC
FBB_D39
M2
DQ7
NC
FBB_EDC6
FBB_EDC4
R2
FBB_DBI6
EDC0
FBB_DBI4
NC
P2
DBI0
NC
V10
FBB_VREFD_H
FBB_D56
VREFD
FBB_D40
FBB_D57
V11
DQ8
FBB_D41
V13
FBB_D58
DQ9
FBB_D42
FBB_D59
T11
DQ10
C286
FBB_D43
T13
FBB_D60
DQ11
FBB_D44
FBB_D61
N11
DQ12
FBB_D45
FBB_D62
N13
DQ13
FBB_D46
M11
FBB_D63
DQ14
FBB_D47
M13
DQ15
FBB_EDC7
GND
FBB_EDC5
FBB_DBI7
R13
EDC1
FBB_DBI5
P13
DBI1
P4
WCK01
15
FBB_WCK45
P5
15
FBB_WCK45#
WCK01
K4G41325FC-HC03
15
FBB_WCK67
15
FBB_WCK67#
FBB_VREF_FET_H
D
Q12B
5
G
MTDN7002ZHS6R
16,17,18,20
GPIO10_FBVREF_ALTV
S
GND
15
FBB_EDC[7:4]
FBB_EDC4
FBB_EDC5
FBB_EDC6
FBB_EDC7
15
FBB_DBI[7:4]
FBB_DBI4
FBB_DBI5
FBB_DBI6
FBB_DBI7
FBVDDQ
C318
C236
C215
C500
C327
10u_6.3V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
GND
FBVDDQ
C47
C499
C389
C328
C247
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
GND
5
4
3
FBB_CMD28
L3
FBB_CMD31
G3
FBB_CMD21
G12
FBB_CMD16
L12
FBB_CMD24
J4
U20A
INS284423878
FBB_CMD26
K4
BGA170_MIRR
FBB_CMD27
COMMON
K5
FBB_CMD18
K11
MIRRORED
FBB_CMD17
K10
x32
x16
FBB_CMD19
H11
FBB_CMD20
A11
DQ16
H10
NC
FBB_CMD23
A13
H5
DQ17
NC
FBB_CMD22
B11
DQ18
H4
NC
FBB_CMD25
B13
FBVDDQ
J5
DQ19
E11
NC
DQ20
NC
E13
DQ21
F11
NC
DQ22
NC
F13
R125
DQ23
NC
*549_1%_04
FBB_CMD29
C13
J2
EDC2
GND
D13
FBB_CMD30
J3
DBI2
NC
J12
0.4
FBB_VREFD_H
A10
J11
VREFD
A4
DQ24
A2
DQ25
B4
C261
R133
R164
DQ26
B2
DQ27
*1.33K_1%_04
80.6_1%_04
E4
R134
DQ28
E2
DQ29
*931_1%_04
F4
DQ30
F2
DQ31
GND
GND
A5
C2
V5
EDC3
D2
DBI3
D4
FBVDDQ
WCK23
D5
WCK23
K4G41325FC-HC03
R169
549_1%_04
0.4
FBB_VREFC1
J14
FBB_ZQ2
J13
R166
R168
C309
FBB_SEN2
931_1%_04
1.33K_1%_04
J10
R167
121_1%_04
R161
1K_04
GND
GND
GND
GND
FBVDDQ
C501
C301
C387
C224
C322
10u_6.3V_X5R_06
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
GND
FBVDDQ
FBVDDQ
C333
C496
C295
C495
C506
C505
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
GND
GND
3
2
1
U20B
INS284424754
BGA170_MIRR
COMMON
RAS
CAS
WE
CS
ABI
A0_A10
A1_A9
A2_BA0
A3_BA3
A4_BA2
A5_BA1
A6_A11
A7_A8
RFU_A12
RESET
CKE
CLK
U20C
CLK
INS284424858
BGA170_MIRR
COMMON
R842
Mirrored
J1
FBB_SOE3
R371
SOE*/MF_VDD
add 1k to VDD
B10
C10
VSS
VDD
FBVDDQ
B5
C5
VSS
VDD
D10
D11
NC_RFU_A5
VSS
VDD
G10
G1
NC_RFU_V5
VSS
VDD
G5
G11
VSS
VDD
H1
G14
VSS
VDD
H14
G4
VSS
VDD
K1
L1
VSS
VDD
K14
L11
VSS
VDD
L10
L14
VSS
VDD
L5
L4
VSS
VDD
P10
P11
VSS
VDD
T10
R10
VSS
VDD
T5
R5
FBVDDQ
VSS
VDD
VREFC
A1
B1
VSSQ
VDDQ
ZQ
A12
VSSQ
VDDQ
B12
A14
B14
VSSQ
VDDQ
SEN
A3
VSSQ
VDDQ
B3
C1
D1
VSSQ
VDDQ
C11
D12
VSSQ
VDDQ
K4G41325FC-HC03
C12
D14
VSSQ
VDDQ
C14
D3
VSSQ
VDDQ
C3
E10
VSSQ
VDDQ
C4
E5
VSSQ
VDDQ
E1
F1
VSSQ
VDDQ
E12
F12
VSSQ
VDDQ
E14
F14
VSSQ
VDDQ
E3
F3
VSSQ
VDDQ
F10
G13
VSSQ
VDDQ
F5
G2
VSSQ
VDDQ
H13
H12
VSSQ
VDDQ
H2
H3
VSSQ
VDDQ
K13
VSSQ
VDDQ
K12
K2
K3
VSSQ
VDDQ
M10
VSSQ
VDDQ
L13
M5
L2
VSSQ
VDDQ
N1
VSSQ
VDDQ
M1
N12
M12
VSSQ
VDDQ
N14
M14
VSSQ
VDDQ
N3
M3
VSSQ
VDDQ
R1
N10
VSSQ
VDDQ
R11
N5
VSSQ
VDDQ
R12
P1
VSSQ
VDDQ
R14
P12
VSSQ
VDDQ
R3
P14
VSSQ
VDDQ
R4
P3
VSSQ
VDDQ
V1
T1
VSSQ
VDDQ
V12
T12
VSSQ
VDDQ
V14
T14
VSSQ
VDDQ
V3
T3
VSSQ
VDDQ
K4G41325FC-HC03
GND
C48
0.1u_10V_X7R_04
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
Title
Title
Title
[19] VGA Frame Buffer B
[19] VGA Frame Buffer B
[19] VGA Frame Buffer B
Size
Size
Size
Document Number
Document Number
Document Number
15,16,17,18,46
FBVDDQ
6-71-W3S50-D02A
6-71-W3S50-D02A
6-71-W3S50-D02A
Custom
Custom
Custom
Date:
Date:
Date:
Friday, January 10, 2014
Friday, January 10, 2014
Friday, January 10, 2014
Sheet
Sheet
Sheet
2
1
D
1213
1K_04
FBVDDQ
*1K_04
GND
C
B
A
Rev
Rev
Rev
1.0
1.0
1.0
19
19
19
of
of
of
58
58
58
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