Clevo W355SSQ Service Manual page 61

Haswell 7/7
5
CFG Straps for Processor
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
D
(Default)
CFG2 1: (DEFAULT)NORMAL OPERATION;
LANE# DEFINITION MATCHES
0: LANE REVERSAL
CFG2 R84 *1K_04
NOTE:
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
0 : ENABLED SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
1 : DISABLED
CFG3 R77 *1K_04
C
DISPLAY PORT PRESENCE STRAP
1: DISABLED;
CFG4
NO PHYSICAL DISPLAY PORT ATTACHED
TO EMBEDDED DISPLAY PORT
0: ENABLED; AN EXTERNAL DISPLAY PORT DEVICE
AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED
TO THE EMBEDDED DISPLAY PORT
(Default)
CFG4 R358 1K_04
PCIE Port Bifurcation Straps
11: DEVICE1 FUNTION 1, DEVICE 1 FUNCTION2 DISABLED
10: DEVICE1 FUNCTION1 ENABLED DEVICE1 FUNCTION 2 DISABLED
B
01: DEVICE 1 FUNCTION 1 DISABLED, DEVICE 1 FUNCTION 2 ENABLED
CFG[6:5]
00: DEVICE 1 FUNCTION 1 ENABLED, DEVICE 1 FUNCTION 2 ENABLED
CFG5 R73 *1K_04
CFG6 R353 *1K_04
DEFENSIVE PULL DOWN SITE
1: (Default) PEG Train immediately following xxRESETB de assertion
CFG7
0: PEG Wait for BIOS for training
CFG7 R72 *1K_04
A
5
4 3
Haswell Processor 7/7 ( RESERVED )
U15I
AT1
RSVD_TP
AT2
RSVD_TP
AD10
RSVD
A34
RSVD_TP
A35
RSVD_TP
W29
RSVD_TP
W28
RSVD_TP
R57 49.9_1%_04 H_CPU_RSVD30 G26
TESTLO
W33
RSVD
AL30
RSVD
AL29
RSVD
F25
+VCCIN
VCC
C35
RSVD_TP
B35
RSVD_TP
AL25
RSVD_TP
W30
RSVD_TP
W31
RSVD_TP
R11 49.9_1%_04 H_CPU_RSVD40 W34
TESTLO
CFG0 AT20
CFG_0
CFG1 AR20
CFG_1
CFG2 AP20
CFG_2
AP22
CFG3
CFG_3
CFG4 AT22
CFG_4
CFG5 AN22
CFG_5
CFG6 AT25
CFG_6
CFG7 AN23
CFG_7
CFG8 AR24
CFG_8
R700 *1K_1%_04 CFG9 AT23
CFG_9
CFG10 AN20
CFG_10
CFG11 AP24
CFG_11
CFG12 AP26
CFG_12
CFG13 AN25
CFG_13
CFG14 AN26
CFG_14
CFG15 AP25
CFG_15
NOTE:
RESERVE THIS CIRCUIT FOR FUTURE COMPATIBILITY
2,3,13,20,22,24,26,27,28,29,30,31,32,33,34,37,40,42,45,46
4 3
2
Haswell rPGA EDS
C23
RSVD_TP
B23
RSVD_TP
D24
RSVD_TP
D23
RSVD_TP
AT31 CFG_RCOMP
R343 49.9_1%_04
CFG_RCOMP
AR21 CFG16
CFG_16
AR23 CFG17
CFG_18
AP21 CFG18
CFG_17
AP23 CFG19
CFG_19
AR33
RSVD FC_G6
G6
FC
AM27
RSVD
AM26
RSVD
F5
RSVD
AM2
RSVD
K6
RSVD
E18
RSVD
U10
RSVD
P10
RSVD
B1
NC
A2
RSVD
AR1
RSVD_TP
E21
RSVD_TP
E20
RSVD_TP
AP27
VSS
AR26
VSS
AL31
VSS
AL32
VSS
9 OF 9
PM_PCH_PWROK 24,39
R385
*2K_1%_04
FC_G6
R387
*1K_1%_04
! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/ ! ! ! !!DMFWP!DP/
Title Title Title
[08] Haswell Processor 7/7 [08] Haswell Processor 7/7 [08] Haswell Processor 7/7
Size Size Size Document Number Document Number Document Number
5,44 +VCCIN
Custom Custom Custom 6-71-W3S50-D02A 6-71-W3S50-D02A 6-71-W3S50-D02A
3.3V
Date: Date: Date: Friday, January 10, 2014 Friday, January 10, 2014 Friday, January 10, 2014
2
Schematic Diagrams
1
D
Sheet 8 of 58
Haswell 7/7
C
B
A
Rev Rev Rev
1.0 1.0 1.0
Sheet Sheet Sheet 8 8 8 of of of 58 58 58
1
Haswell 7/7 B - 9