Table of Contents
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Haswell 3/7
5
6-86-27988-003 PZ98927-3641-01F
6-86-27988-001 47989-0732
6-86-27988-004 PZ98821-362B-01H
9,11
M_A_DQ[63:0]
Haswell rPGA EDS
M_A_DQ0
AR15
D
M_A_DQ1
SA_DQ_0
AT14
M_A_DQ2
SA_DQ_1
AM14
SA_DQ_2
M_A_DQ3
AN14
SA_DQ_3
M_A_DQ4
AT15
SA_DQ_4
M_A_DQ5
AR14
SA_DQ_5
M_A_DQ6
AN15
SA_DQ_6
M_A_DQ7
AM15
M_A_DQ8
SA_DQ_7
AM9
M_A_DQ9
SA_DQ_8
AN9
SA_DQ_9
M_A_DQ10
AM8
SA_DQ_10
M_A_DQ11
AN8
SA_DQ_11
M_A_DQ12
AR9
SA_DQ_12
M_A_DQ13
AT9
SA_DQ_13
M_A_DQ14
AR8
M_A_DQ15
SA_DQ_14
AT8
SA_DQ_15
M_A_DQ16
AJ9
SA_DQ_16
M_A_DQ17
AK9
SA_DQ_17
M_A_DQ18
AJ6
SA_DQ_18
M_A_DQ19
AK6
SA_DQ_19
M_A_DQ20
AJ10
M_A_DQ21
SA_DQ_20
AK10
M_A_DQ22
SA_DQ_21
AJ7
SA_DQ_22
M_A_DQ23
AK7
SA_DQ_23
M_A_DQ24
AF4
SA_DQ_24
M_A_DQ25
AF5
SA_DQ_25
M_A_DQ26
AF1
SA_DQ_26
M_A_DQ27
AF2
M_A_DQ28
SA_DQ_27
AG4
M_A_DQ29
SA_DQ_28
C
AG5
SA_DQ_29
M_A_DQ30
AG1
SA_DQ_30
M_A_DQ31
AG2
SA_DQ_31
M_A_DQ32
J1
SA_DQ_32
M_A_DQ33
J2
SA_DQ_33
6.5 / 8 / 16
M_A_DQ34
J5
M_A_DQ35
SA_DQ_34
2VIA
H5
SA_DQ_35
M_A_DQ36
3700mils
H2
SA_DQ_36
M_A_DQ37
H1
SA_DQ_37
M_A_DQ38
J4
SA_DQ_38
M_A_DQ39
H4
SA_DQ_39
M_A_DQ40
F2
M_A_DQ41
SA_DQ_40
F1
M_A_DQ42
SA_DQ_41
D2
SA_DQ_42
M_A_DQ43
D3
SA_DQ_43
M_A_DQ44
D1
SA_DQ_44
M_A_DQ45
F3
SA_DQ_45
M_A_DQ46
C3
SA_DQ_46
M_A_DQ47
B3
M_A_DQ48
SA_DQ_47
B5
SA_DQ_48
M_A_DQ49
E6
SA_DQ_49
SA_DQS_N_0
M_A_DQ50
A5
SA_DQ_50
SA_DQS_N_1
M_A_DQ51
D6
SA_DQ_51
SA_DQS_N_2
M_A_DQ52
D5
SA_DQ_52
SA_DQS_N_3
M_A_DQ53
E5
SA_DQ_53
SA_DQS_N_4
M_A_DQ54
B6
M_A_DQ55
SA_DQ_54
SA_DQS_N_5
A6
SA_DQ_55
SA_DQS_N_6
M_A_DQ56
E12
SA_DQ_56
SA_DQS_N_7
M_A_DQ57
D12
SA_DQ_57
SA_DQS_P_0
B
M_A_DQ58
B11
SA_DQ_58
SA_DQS_P_1
M_A_DQ59
A11
SA_DQ_59
SA_DQS_P_2
M_A_DQ60
E11
M_A_DQ61
SA_DQ_60
SA_DQS_P_3
D11
M_A_DQ62
SA_DQ_61
SA_DQS_P_4
B12
SA_DQ_62
SA_DQS_P_5
M_A_DQ63
A12
SA_DQ_63
SA_DQS_P_6
V_SM_VREF
AM3
SM_VREF
SA_DQS_P_7
+V_DDR_WR_VREF01
F16
SA_DIMM_VREFDQ
+V_DDR_WR_VREF02
F13
SB_DIMM_VREFDQ
C312
1u_6.3V_X5R_04
3 OF 9
All VREF traces should be at least 20 mils wide
and 20 mils spacing to other singals/planes
V_VDDQ_DIMM
R438
0_04
R278
Q16
1K_1%_04
*AO3402L
A
+V_DDR_WR_VREF01
S
D
R435
R440
*1K_04
C414
1K_1%_04
0.1u_10V_X7R_04
DRAMRST_CNTRL
3,4,23
5
4
3
10
M_B_DQ[63:0]
U15C
AC7
RSVD_AC7
RSVD_AC7
M_B_DQ0
U4
4.5/ 4.5/ 16
M_A_CLK_DDR#0
9
SA_CK_N_0
M_B_DQ1
V4
7 / 12 / 25
SA_CK_P_0
M_A_CLK_DDR0
9
M_B_DQ2
AD9
2VIA
SA_CKE_0
M_A_CKE0
9
M_B_DQ3
U3
M_A_CLK_DDR#1
9
SA_CK_N_1
V3
M_B_DQ4
4.5/ 4.5/ 16
M_A_CLK_DDR1
9
SA_CK_P_1
AC9
7 / 12 / 25
M_B_DQ5
M_A_CKE1
9
SA_CKE_1
U2
2VIA
M_B_DQ6
M_A_CLK_DDR#2
11
SA_CK_N_2
M_B_DQ7
V2
4.5/ 4.5/ 16
M_A_CLK_DDR2
11
SA_CK_P_2
M_B_DQ8
AD8
7 / 12 / 25
SA_CKE_2
M_A_CKE2
11
M_B_DQ9
U1
2VIA
M_A_CLK_DDR#3
11
SA_CK_N_3
V1
M_B_DQ10
4.5/ 4.5/ 16
M_A_CLK_DDR3
11
SA_CK_P_3
AC8
M_B_DQ11
7 / 12 / 25
M_A_CKE3
11
SA_CKE_3
2VIA
M_B_DQ12
M7
M_B_DQ13
M_A_CS#0
9
SA_CS_N_0
M_B_DQ14
L9
7 / 12 / 25
SA_CS_N_1
M_A_CS#1
9
M_B_DQ15
M9
2VIA
SA_CS_N_2
M_A_CS#2
11
M_B_DQ16
M10
M_A_CS#3
11
SA_CS_N_3
M8
M_B_DQ17
M_A_ODT0
9
SA_ODT_0
L7
7 / 12 / 25
M_B_DQ18
M_A_ODT1
9
SA_ODT_1
L8
2VIA
M_B_DQ19
M_A_ODT2
11
SA_ODT_2
M_B_DQ20
L10
M_A_ODT3
11
SA_ODT_3
M_B_DQ21
V5
SA_BS_0
M_A_BS0
9,11
M_B_DQ22
U5
11.5 / 9 / 16
SA_BS_1
M_A_BS1
9,11
M_B_DQ23
AD1
2VIA
SA_BS_2
M_A_BS2
9,11
M_B_DQ24
V10
M_B_DQ25
VSS
U6
11.5 / 9 / 16
M_B_DQ26
M_A_RAS#
9,11
SA_RAS
M_B_DQ27
U7
2VIA
M_A_WE#
9,11
SA_WE
M_B_DQ28
U8
SA_CAS
M_A_CAS#
9,11
M_B_DQ29
M_A_A[15:0]
9,11
V8
M_A_A0
M_B_DQ30
SA_MA_0
AC6
M_A_A1
M_B_DQ31
SA_MA_1
V9
M_A_A2
M_B_DQ32
SA_MA_2
U9
M_A_A3
M_B_DQ33
SA_MA_3
M_A_A4
M_B_DQ34
AC5
SA_MA_4
M_A_A5
M_B_DQ35
AC4
SA_MA_5
M_A_A6
M_B_DQ36
AD6
SA_MA_6
AC3
M_A_A7
M_B_DQ37
SA_MA_7
AD5
M_A_A8
M_B_DQ38
SA_MA_8
AC2
M_A_A9
11.5 / 9 / 16
M_B_DQ39
SA_MA_9
M_A_A10
M_B_DQ40
V6
2VIA
SA_MA_10
M_A_A11
M_B_DQ41
AC1
SA_MA_11
M_A_A12
M_B_DQ42
AD4
SA_MA_12
M_A_A13
M_B_DQ43
V7
SA_MA_13
AD3
M_A_A14
M_B_DQ44
SA_MA_14
AD2
M_A_A15
M_B_DQ45
SA_MA_15
M_B_DQ46
M_B_DQ47
M_A_DQS#[7:0]
9,11
M_A_DQS#0
M_B_DQ48
AP15
M_A_DQS#1
M_B_DQ49
AP8
AJ8
M_A_DQS#2
M_B_DQ50
AF3
M_A_DQS#3
M_B_DQ51
J3
M_A_DQS#4
6.5 / 6.5 / 16
M_B_DQ52
E2
M_A_DQS#5
2VIA
M_B_DQ53
M_A_DQS#6
M_B_DQ54
C5
M_A_DQS#7
M_B_DQ55
C11
M_A_DQS[7:0]
9,11
M_A_DQS0
M_B_DQ56
AP14
AP9
M_A_DQS1
M_B_DQ57
AK8
M_A_DQS2
M_B_DQ58
AG3
M_A_DQS3
M_B_DQ59
M_A_DQS4
M_B_DQ60
H3
6.5 / 6.5 / 16
M_A_DQS5
M_B_DQ61
E3
2VIA
M_A_DQS6
M_B_DQ62
C6
M_A_DQS7
M_B_DQ63
C12
DIMM
& TRACE
V_VDDQ_DIMM
R448
0_04
Q17
*AO3402L
MVREF_DQ_DIMMA
9,11
+V_DDR_WR_VREF02
S
D
R447
*1K_04
DRAMRST_CNTRL
4
3
2
6-86-27988-003 PZ98927-3641-01F
6-86-27988-001 47989-0732
6-86-27988-004 PZ98821-362B-01H
Haswell rPGA EDS
U15D
RSVD_AG8
AR18
AG8
SB_DQ_0
RSVD
AT18
Y4
SB_DQ_1
SB_CKN0
M_B_CLK_DDR#0
AM17
AA4
SB_DQ_2
SB_CK0
M_B_CLK_DDR0
AM18
AF10
M_B_CKE0
10
SB_DQ_3
SB_CKE_0
AR17
Y3
M_B_CLK_DDR#1
SB_DQ_4
SB_CKN1
AT17
AA3
M_B_CLK_DDR1
SB_DQ_5
SB_CK1
AN17
AG10
M_B_CKE1
10
SB_DQ_6
SB_CKE_1
AN18
Y2
SB_DQ_7
SB_CKN2
AT12
AA2
SB_DQ_8
SB_CK2
AR12
AG9
SB_DQ_9
SB_CKE_2
AN12
Y1
SB_DQ_10
SB_CKN3
AM11
AA1
SB_DQ_11
SB_CK3
AT11
AF9
SB_DQ_12
SB_CKE_3
AR11
SB_DQ_13
AM12
P4
SB_DQ_14
SB_CS_N_0
M_B_CS#0
10
AN11
R2
SB_DQ_15
SB_CS_N_1
M_B_CS#1
10
AR5
P3
SB_DQ_16
SB_CS_N_2
AR6
P1
SB_DQ_17
SB_CS_N_3
AM5
SB_DQ_18
AM6
R4
M_B_ODT0
10
SB_DQ_19
SB_ODT_0
AT5
R3
M_B_ODT1
10
SB_DQ_20
SB_ODT_1
AT6
R1
SB_DQ_21
SB_ODT_2
AN5
P2
SB_DQ_22
SB_ODT_3
AN6
R7
M_B_BS0
10
SB_DQ_23
SB_BS_0
AJ4
P8
M_B_BS1
10
SB_DQ_24
SB_BS_1
AK4
AA9
M_B_BS2
10
SB_DQ_25
SB_BS_2
AJ1
SB_DQ_26
AJ2
R10
SB_DQ_27
VSS
AM1
R6
SB_DQ_28
SB_RAS
M_B_RAS#
10
AN1
P6
M_B_WE#
10
SB_DQ_29
SB_WE
AK2
P7
M_B_CAS#
10
SB_DQ_30
SB_CAS
AK1
M_B_A[15:0]
SB_DQ_31
L2
R8
M_B_A0
SB_DQ_32
SB_MA_0
M2
Y5
M_B_A1
SB_DQ_33
SB_MA_1
M_B_A2
L4
Y10
SB_DQ_34
SB_MA_2
M_B_A3
M4
AA5
SB_DQ_35
SB_MA_3
M_B_A4
L1
Y7
SB_DQ_36
SB_MA_4
M1
AA6
M_B_A5
SB_DQ_37
SB_MA_5
L5
Y6
M_B_A6
SB_DQ_38
SB_MA_6
M5
AA7
M_B_A7
SB_DQ_39
SB_MA_7
M_B_A8
G7
Y8
SB_DQ_40
SB_MA_8
M_B_A9
J8
AA10
SB_DQ_41
SB_MA_9
M_B_A10
G8
R9
SB_DQ_42
SB_MA_10
M_B_A11
G9
Y9
SB_DQ_43
SB_MA_11
J7
AF7
M_B_A12
SB_DQ_44
SB_MA_12
J9
P9
M_B_A13
SB_DQ_45
SB_MA_13
G10
AA8
M_B_A14
SB_DQ_46
SB_MA_14
M_B_A15
J10
AG7
SB_DQ_47
SB_MA_15
A8
SB_DQ_48
B8
SB_DQ_49
M_B_DQS#[7:0]
A9
AP18
M_B_DQS#0
SB_DQ_50
SB_DQS_N_0
B9
AP11
M_B_DQS#1
SB_DQ_51
SB_DQS_N_1
D8
AP5
M_B_DQS#2
SB_DQ_52
SB_DQS_N_2
E8
AJ3
M_B_DQS#3
SB_DQ_53
SB_DQS_N_3
M_B_DQS#4
D9
L3
SB_DQ_54
SB_DQS_N_4
M_B_DQS#5
E9
H9
SB_DQ_55
SB_DQS_N_5
M_B_DQS#6
E15
C8
SB_DQ_56
SB_DQS_N_6
D15
C14
M_B_DQS#7
SB_DQ_57
SB_DQS_N_7
M_B_DQS[7:0]
A15
AP17
M_B_DQS0
SB_DQ_58
SB_DQS_P_0
B15
AP12
M_B_DQS1
SB_DQ_59
SB_DQS_P_1
M_B_DQS2
E14
AP6
SB_DQ_60
SB_DQS_P_2
M_B_DQS3
D14
AK3
SB_DQ_61
SB_DQS_P_3
M_B_DQS4
A14
M3
SB_DQ_62
SB_DQS_P_4
M_B_DQS5
B14
H8
SB_DQ_63
SB_DQS_P_5
C9
M_B_DQS6
SB_DQS_P_6
C15
M_B_DQS7
SB_DQS_P_7
4 OF 9
R195
0_04
R194
1K_1%_04
V_VDDQ_DIMM
Q2
*AO3402L
V_SM_VREF
S
D
10/22
R170
R196
C317
*1K_04
1K_1%_04
0.1u_10V_X7R_04
R628
DRAMRST_CNTRL
3,4,23
1K_1%_04
MVREF_DQ_DIMMB
10
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
R449
C684
1K_1%_04
0.1u_10V_X7R_04
Title
Title
Title
[04] Haswell 3/7-DDR3
[04] Haswell 3/7-DDR3
[04] Haswell 3/7-DDR3
Size
Size
Size
Document Number
Document Number
Document Number
Custom
Custom
Custom
3,4,23
3,5,9,10,11,42
V_VDDQ_DIMM
Date:
Date:
Date:
Friday, January 10, 2014
Friday, January 10, 2014
Friday, January 10, 2014
2
Schematic Diagrams
1
D
10
10
10
10
Sheet 4 of 58
Haswell 3/7
C
10
10
B
10
+V_VREF_CA_DIMM
9,10,11
A
Rev
Rev
Rev
6-71-W3S50-D02A
6-71-W3S50-D02A
6-71-W3S50-D02A
1.0
1.0
1.0
Sheet
Sheet
Sheet
4
4
4
of
of
of
58
58
58
1
Haswell 3/7 B - 5
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