Table of Contents
Advertisement
RAA3064002GFP/RAA3064003GFP
Table 5.8 SPI Timing
Conditions: T
= -40 to +105°C, AV
A
Item
SCLK cycle
SCLK high-level width
SCLK rising/falling time
SDI input setup time
(to the rising edge of SCLK)
SDI input hold time
(from the rising edge of SCLK)
Delay from the falling edge of SCLK to valid
SDO
SCLK
SDI
SDO
R03UZ0002EJ0120 Rev.1.20
Apr 05, 2021
= EV
= IOV
= 4.5 to 5.5 V, AV
DD
DD
DD
Symbol
Condition
t
SKCY
t
SKH
t
, t
SKR
SKF
t
SDI
t
HDI
t
Load capacitance on the
DDO
SDO pin: 20 pF
t
t
SKH
SKR
t
t
SDI
HDI
Figure 5.6 SPI Timing
= EV
= IOV
SS
SS
Min.
4
375
60
20
t
SKF
t
SKCY
t
DDO
5. Electrical Characteristics
= 0 V
SS
Typ.
Max.
Unit
t
XCY
ns
20
ns
ns
ns
40
ns
Page 41 of 52
Advertisement
Table of Contents
