Renesas RAA3064002GFP User Manual page 40

Cmos ics resolver-to-digital converters
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RAA3064002GFP/RAA3064003GFP
AV
, EV
, IOV
DD
DD
DD
0 V
RESET#
SPI communications
State of the internal circuits
RESET#
SPI communications
State of the internal circuits
Figure 4.6 Sequence of a Reset while Power is being Supplied
AV
, EV
, IOV
DD
DD
DD
RESET#
SPI communications
State of the internal circuits
Figure 4.7 Sequence of a Reset on Detection of the Voltage Falling to or Below the Specified Level
R03UZ0002EJ0120 Rev.1.20
Apr 05, 2021
1.8 V
t
Min. 1 ms
RESWP
Communications disabled
Power-saving state
Figure 4.5 Sequence of a Reset when Power is Turned On
t
Min. 1 ms
RESW
Communications
Communications
enabled
disabled
Resolver signals
Power-saving state
can be converted.
V
DET
Min. 1 ms
Communications
Communications
enabled
disabled
Resolver signals
Power-saving state
can be converted.
Release from the power-saving state (by register settings)
Release from the
power-saving state
Min. 30 ms
Release from the power-saving state (by register settings)
Release from the
power-saving state
Min. 30 ms
V
+ V
DET
DETH
Release from the power-saving state (by register settings)
Release from the
power-saving state
Min. 30 ms
Communications enabled
Resolver signals
can be converted.
Communications enabled
Resolver signals
can be converted.
Communications enabled
Resolver signals
can be converted.
Page 35 of 52
4. Operation

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