HP 53181A Programming Manual page 84

Frequency counter
Hide thumbs Also See for 53181A:
Table of Contents

Advertisement

Programming Your Counter for Remote Operation
Status Reporting
Table 3-4. Standard Event Status Register
BIT
WEIGHT
SYMBOL
0
1
OPC
1
(RQC)
2
4
QYE
3
8
DDE
4
16
EXE
5
32
CME
6
(URQ)
7
128
PON
A detailed description of each bit in the Standard Event Status Register follows:
• Bit 0 (Operation Complete) is an event bit which is generated in response
to the *OPC command. This bit indicates that the Counter has completed all
pending operations.
Specifically, this event bit indicates that the pending operation condition has
transitioned from TRUE to FALSE.
If
the :TRIGger:COUNt:AUTO is OFF, or
statistics are disabled, or
the function is set to Voltage Peaks,
then the pending operation condition is set TRUE when either: 1) a single
measurement is initiated, or 2) a continuous measurement cycle is initiated.
The pending operation condition is set FALSE when the measurement cycle
terminates.
3-26
DESCRIPTION
Operation Complete
Not used because this instrument
cannot request permission to become active
IEEE 488.1 controller-in-charge.
Query Error
Device-Specific Error
Execution Error
Command Error
Not used because this instrument does not
define any local controls as " User Request"
controls.
Power On

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents