Texas Instruments TRF7960 Manual page 7

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TERMINAL
TYPE
NAME NO.
MOD 14
VSS_A 15
VDD_I/O 16
I/O_0 17
I/O_1 18
I/O_2 19
I/O_3 20
I/O_4 21
I/O_5 22
I/O_6 23
I/O_7 24
EN2 25
DATA_CLK 26
SYS_CLK 27
EN 28
VSS_D 29
OSC_OUT 30
OSC_IN 31
VDD_X 32
Thermal Pad
Copyright © 2006–2017, Texas Instruments Incorporated
Table 4-1. Signal Descriptions (continued)
(1)
INP Direct mode, external modulation input
SUP Negative supply for internal analog circuits; normally connected to circuit ground
Supply for I/O communications (1.8 V to 5.5 V). Should be connected to VIN for 5-V
SUP
communication, VDD_X for 3.3-V communication, or any other voltage from 1.8 V to 5.5 V.
BID I/O pin for parallel communication
BID I/O pin for parallel communication
BID I/O pin for parallel communication
BID I/O pin for parallel communication
BID I/O pin for parallel communication
I/O pin for parallel communication
BID Strobe out clock for serial communication
Data clock output in direct mode
I/O pin for parallel communication
BID MISO for serial communication (SPI)
Serial bit data output in direct mode 1 or subcarrier signal in direct mode 0
I/O pin for parallel communication.
BID
MOSI for serial communication (SPI)
Pulse enable and selection of power-down mode. If EN2 is connected to VIN, then VDD_X is
INP active during power down to support the MCU. Pin can also be used for pulse wake up from
power-down mode.
INP Clock input for MCU communication (parallel and serial)
Clock for MCU (3.39 / 6.78 / 13.56 MHz) at EN = 1 and EN2 = don't care
OUT
If EN = 0 and EN2 = 1, then system clock is set to 60 kHz
INP Chip enable input (If EN = 0, then chip is in power-down mode.)
SUP Negative supply for internal digital circuits; normally connected to circuit ground
OUT Crystal oscillator output
INP Crystal oscillator input
OUT Internally regulated supply (2.7 V to 3.4 V) for external circuitry (MCU)
Connected to circuit ground
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SLOU186G – AUGUST 2006 – REVISED MAY 2017
DESCRIPTION
Terminal Configuration and Functions
TRF7960 TRF7961
TRF7960, TRF7961
7