Texas Instruments TRF7960 Manual page 20

TRF7960, TRF7961
SLOU186G – AUGUST 2006 – REVISED MAY 2017
6.3.3.2 Transmitter – Digital Section
The digital portion of the transmitter is very similar to that of the receiver. Before beginning data
transmission, the FIFO should be cleared with a Reset command (0x0F). Data transmission is initiated
with a selected command (see
command (3Dh, see
Byte1 (upper and middle nibbles), while the following byte in register 1Eh is the TX Length Byte2 (lower
nibble and broken byte length). The TX byte length determines when the reader sends the EOF byte. After
the TX length bytes, FIFO data is loaded in register 1Fh with byte storage locations 0 to 11. Data
transmission begins automatically after the first byte is written into the FIFO. The TX Length bytes and
FIFO can be loaded with a continuous-write command because the addresses are sequential.
If the data length is longer than the allowable size of the FIFO, the external system (MCU) is warned when
the majority of data from the FIFO has already been transmitted by sending an interrupt request with a
flag in the IRQ register signaling FIFO low or high status. The external system should respond by loading
the next data packet into the FIFO.
At the end of the transmit operation, the external system is notified by another interrupt request with a flag
in the IRQ register that signals the end of TX.
The TX Length register also supports incomplete bytes transmitted. The high 2 nibbles in register 0x1D
and the nibble composed of bits B4 to B7 in register 0x1E store the number of complete bytes to be
transmitted. Bit 0 (in register 0x1E) is a flag that signals the presence of additional bits to be transmitted
that do not form a complete byte. The number of bits are stored in bits B1 to B3 of the same register
(0x1E).
The protocol is selected by the ISO Control register (address 0x01), which also selects the receiver
protocol. As defined by the selected protocol, the reader automatically adds all the special signals, like
start of communication, end of communication, SOF, EOF, parity bits, and CRC bytes. The data is then
coded to the modulation pulse level and sent to the modulation control of the RF output stage. This means
that the external system is only required to load the FIFO with data, and all the low-level coding is done
automatically. Also, all registers used in transmission are automatically preset to the optimum value when
a new selection is entered into the ISO Control register.
Some protocols have options, and two registers are provided to select the TX protocol options. The first
register is ISO14443B TX Options (address 0x02). This register controls the SOF and EOF selection and
EGT (extra guard time) selection for the ISO/IEC 14443 B protocol (see
The second register controls the ISO/IEC 14443 high-bit-rate options. This register enables the use of
different bit rates for RX and TX operations in the ISO/IEC 14443 high bit-rate protocol. Additionally, it also
selects the parity system for the ISO/IEC 14443 A high-bit-rate selection (see
The transmit section also has a timer that can be used to start the transmit operation at a precise time
interval from a selected event. This is necessary if the tag requires a reply in an exact window of time
following the tag response. The TX timer uses two registers (addresses 0x04 and 0x05). In first register
(address 0x04), two bits (B7 and B6) define the trigger conditions. The remaining 6 bits are the upper bits
and the 8 bits in register address 0x05 are lower bits, which are preset to the counter. The increment is
590 ns and the range of this counter is from 590 ns to 9.7 ms. See
(trigger conditions).
6.3.4 Direct Mode
Direct mode supports two configurations:
Direct mode 0 (bit 6 = 0 in the ISO Control register) enables use of only the front-end functions of the
reader, bypassing the protocol implementation in the reader. For transmit functions, the application has
direct access to the transmit modulator through the MOD pin (pin 14). On the receive side, the application
has direct access to the subcarrier signal (digitized RF envelope signal) on I/O_6 (pin 23).
20 Detailed Description
Table 6-31). The MCU then commands the reader to do a continuous Write
Table 6-33) starting from register 1Dh. Data written into register 1Dh is the TX Length
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Table
Table 6-16
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6-14)
Table 6-15).
for the bit definitions