Texas Instruments TRF7960 Manual page 30

TRF7960, TRF7961
SLOU186G – AUGUST 2006 – REVISED MAY 2017
Table 6-27 describes the RSSI Levels and Oscillator Status register. This register reports the signal
strength on both reception channels and RF amplitude during RF-off state. The RSSI values are valid from
reception start until the start of the next transmission.
Table 6-27. RSSI Levels and Oscillator Status Register (Address = 0Fh)
BIT BIT NAME FUNCTION
B7 Unused
B6 Oscok Crystal oscillator stable indicator
B5 rssi_x2
RSSI value of auxiliary channel (4 dB
B4 rssi_x1
per step). MSB is B5.
B3 rssi_x0
B2 rssi_2
RSSI value of active channel (4 dB
B1 rssi_1
per step). MSB is B2.
B0 rssi_0
6.4.4 FIFO Control Registers
Table 6-28 describes the FIFO Status register. This register reports the low nibbles of complete bytes to
be transferred through FIFO, information about a broken byte, and the number of bits to be transferred
from it.
BIT BIT NAME FUNCTION
B7 RFU Set to low
B6 Fhil FIFO level high
B5 Flol FIFO level low
B4 Fove FIFO overflow error
B3 Fb3 FIFO bytes fb[3]
B2 Fb2 FIFO bytes fb[2]
B1 Fb1 FIFO bytes fb[1]
B0 Fb0 FIFO bytes fb[0]
Table 6-29 describes the TX Length Byte1 register. This register reports the high 2 nibbles of complete
bytes to be transferred through the FIFO. The default is 0x00 and is reset at POR and EN = 0. It is also
automatically reset at TX EOF.
BIT BIT NAME FUNCTION
B7 Txl11 Number of complete byte bn[11]
B6 Txl10 Number of complete byte bn[10]
B5 Txl9 Number of complete byte bn[9]
B4 Txl8 Number of complete byte bn[8]
B3 Txl7 Number of complete byte bn[7]
B2 Txl6 Number of complete byte bn[6]
B1 Txl5 Number of complete byte bn[5]
B0 Txl4 Number of complete byte bn[4]
30 Detailed Description
COMMENTS
Auxiliary channel is PM by default. It can be set to AM with option bit B3 of
the Chip State Control register (00h).
Active channel is AM by default. It can be set to PM with option bit B3 of the
Chip State Control register (00h).
Table 6-28. FIFO Status Register (Address = 1Ch)
Table 6-29. TX Length Byte1 Register (Address = 1Dh)
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COMMENTS
Reserved for future use
Indicates that 9 bytes are in the FIFO (for RX)
Indicates that 3 bytes are in the FIFO (for TX)
Too much data was written to the FIFO
Bits B0:B3 indicate how many bytes that are loaded in FIFO were not read
out yet. Reports (N – 1) number of bytes; for example, if 8 bytes are in the
FIFO, this number is 7.
COMMENTS
High nibble of complete bytes to be transmitted
Middle nibble of complete bytes to be transmitted
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