Texas Instruments TRF7960 Manual page 13

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Table 6-5. Supply-Regulator Setting – Automatic – 3-V System
OPTION BITS SETTING IN CONTROL REGISTER
BYTE
ADDRESS
B7 B6
0x00
0x0B 1
0x0B 1
0x0B 1
(1) x = Don't care
6.2.4 Power Modes
The chip has seven power states, which are controlled by two input pins (EN and EN2) and three bits in
the Chip Status Control register (00h).
The main reader enable input is EN (which has a threshold level of 1 V [minimum]). Any input signal level
from 1.8 V to V can be used. When EN is set high, all of the reader regulators are enabled, together with
IN
the 13.56-MHz oscillator, and the SYS_CLK output clock for an external MCU.
The auxiliary enable input EN2 has two functions:
• A direct connection from EN2 to V
auxiliary clock signal (60 kHz) on the SYS_CLK output (same for the case EN = 0). This mode is
intended for systems in which the MCU controlling the reader is also being supplied by the reader
supply regulator (V
the MCU supply and clock be available during power down.
• EN2 enables start-up of the reader system from complete power down (EN = 0, EN2 = 0). In this case,
the EN input is controlled by the MCU or other system device that is without supply voltage during
complete power down (thus unable to control the EN input). A rising edge applied to the EN2 input
(which has a 1-V threshold level) starts the reader supply system and 13.56-MHz oscillator (identical to
condition EN = 1). This start-up mode lasts until all of the regulators have settled and the 13.56-MHz
oscillator has stabilized. If the EN input is set high by the MCU (or other system device), the reader
stays active. If the EN input is not set high within 100 µs after the SYS_CLK output is switched from
auxiliary clock (60 kHz) to high-frequency clock (derived from the crystal oscillator), the reader system
returns to a complete power-down mode. This option can be used to wake the reader system from
complete power down by using a push-button switch or by sending a single pulse.
After the reader EN line is high, the other power modes are selected by control bits.
power mode options and functions.
Copyright © 2006–2017, Texas Instruments Incorporated
(1)
B5 B4 B3 B2 B1
x 1
x 1
x 0
ensures availability of the regulated supply (V
IN
) and the MCU clock is supplied by the SYS_CLK output of the reader. This lets
DD_X
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SLOU186G – AUGUST 2006 – REVISED MAY 2017
B0
0 3-V system
1 Automatic regulator setting; approximately 250-mV difference
0 Automatic regulator setting; approximately 350-mV difference
0 Automatic regulator setting; approximately 400-mV difference
TRF7960 TRF7961
TRF7960, TRF7961
ACTION
) and an
DD_X
Table 6-6 lists the
Detailed Description 13