Texas Instruments TRF7960 Manual
Texas Instruments TRF7960 Manual

Texas Instruments TRF7960 Manual

Multiple-standard fully integrated 13.56-mhz rfid analog front end and data-framing reader system
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TRF7960, TRF7961 Multiple-Standard Fully Integrated 13.56-MHz RFID
Analog Front End and Data-Framing Reader System
1 Device Overview
1.1
Features
1
• Completely Integrated Protocol Handling
• Separate Internal High-PSRR Power Supplies for
Analog, Digital, and PA Sections Provide Noise
Isolation for Superior Read Range and Reliability
• Dual Receiver Inputs With AM and PM
Demodulation to Minimize Communication Holes
• Receiver AM and PM RSSI
• Reader-to-Reader Anticollision
• High Integration Reduces Total BOM and Board
Area
– Single External 13.56-MHz Crystal Oscillator
– MCU-Selectable Clock-Frequency Output of RF,
RF/2, or RF/4
– Adjustable 20-mA High-PSRR LDO for
Powering External MCU
• Easy to Use With High Flexibility
– Automatically Configured Default Modes for
Each Supported ISO Protocol
– 12 User-Programmable Registers
1.2
Applications
Secure Access Control
Product Authentication
1.3
Description
The TRF7960 and TRF7961 devices are integrated analog front end and data-framing systems for a
13.56-MHz
RFID
FeliCa™, and ISO/IEC 15693. Built-in programming options make it suitable for a wide range of
applications for proximity and vicinity identification systems.
The reader is configured by selecting the desired protocol in the control registers. Direct access to all
control registers allows fine-tuning of various reader parameters as needed.
The device supports data rates up to 848 kbps with all framing and synchronization tasks for the ISO
protocols onboard. Other standards and even custom protocols can be implemented by using one of the
direct modes that the device offers. These direct modes let the application fully control the AFE and also
gain access to the raw subcarrier data or the unframed, but already ISO-formatted, data and the
associated (extracted) clock signal.
The receiver system has a dual-input receiver architecture to maximize communication robustness. The
receivers also include various automatic and manual gain control options. The received signal strength
from transponders, ambient sources, or internal levels is available in the RSSI register.
A SPI or parallel interface can be used for the communication between the MCU and the TRF796x reader.
When the built-in hardware encoders and decoders are used, transmit and receive functions use a 12-byte
FIFO register. For direct transmit or receive functions, the encoders or decoders can be bypassed so the
MCU can process the data in real time.
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Order
Product
Folder
Now
reader system that supports multiple protocols including ISO/IEC 14443 A and B,
Tools &
Technical
Software
Documents
– Selectable Receiver Gain
– Programmable Output Power (100 mW or
200 mW)
– Adjustable ASK Modulation Range (8% to 30%)
– Built-In Receiver Band-Pass Filter With User-
Selectable Corner Frequencies
• Wide Operating Voltage Range of 2.7 V to 5.5 V
• Ultra-Low-Power Modes
– Power Down: <1 µA
– Standby: 120 µA
– Active (RX Only): 10 mA
• Parallel 8-Bit or Serial 4-Pin Serial Peripheral
Interface (SPI) With MCU Using 12-Byte FIFO
• Ultra-Small 32-Pin QFN Package (5 mm × 5 mm)
• Available Tools (Also See
– Reference Design and EVM With Development
Software
– Source Code Available for MSP430™ MCU
Medical Systems
Public Transport or Event Ticketing
Support &
Reference
Community
Design
TRF7960, TRF7961
SLOU186G – AUGUST 2006 – REVISED MAY 2017
Tools and
Software)

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Summary of Contents for Texas Instruments TRF7960

  • Page 1 Product Authentication • Public Transport or Event Ticketing Description The TRF7960 and TRF7961 devices are integrated analog front end and data-framing systems for a 13.56-MHz RFID reader system that supports multiple protocols including ISO/IEC 14443 A and B, FeliCa™, and ISO/IEC 15693. Built-in programming options make it suitable for a wide range of applications for proximity and vicinity identification systems.
  • Page 2: Device Overview

    SLOU186G – AUGUST 2006 – REVISED MAY 2017 www.ti.com The TRF7960 and TRF7961 devices support a wide supply voltage range of 2.7 V to 5.5 V and data communication levels from 1.8 V to 5.5 V for the MCU I/O interface.
  • Page 3: Table Of Contents

    Electrostatic Discharge Caution ..............Detailed Description Export Control Notice ..................Overview 8.10 Glossary ........Mechanical, Packaging, and Orderable Power Supplies ..........Information Table of Contents Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 4: Features

    7, Applications, Implementation, and Layout, and moved the application schematics to it ................. • Added Section 8, Device and Documentation Support ............• Added Section 9, Mechanical, Packaging, and Orderable Information Revision History Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 5: Device Comparison

    TI Designs include schematic or block diagrams, BOMs, and design files to speed your time to market. Search and download designs at ti.com/tidesigns. Device Comparison Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 6: Terminal Configuration And Functions

    Direct mode, selects either ASK or OOK modulation (0 = ASK, 1 = OOK) Interrupt request (1) SUP = Supply, INP = Input, BID = Bidirectional, OUT = Output Terminal Configuration and Functions Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 7 Crystal oscillator input VDD_X Internally regulated supply (2.7 V to 3.4 V) for external circuitry (MCU) Thermal Pad Connected to circuit ground Terminal Configuration and Functions Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 8: Specifications

    Oscillator, regulators, RX, AGC, and TX are all driver current active, P = 200 mW Band-gap voltage Internal analog reference voltage Power-on-reset (POR) voltage Regulated supply for analog DD_A circuitry Specifications Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 9: Thermal Resistance Characteristics

    (2) Power rating is determined with a junction temperature of 125°C. This is the temperature at which distortion starts to increase substantially. Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long-term reliability. Specifications Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 10: Overview

    VDD_I/O Crystal 13.56 MHz Copyright © 2017, Texas Instruments Incorporated Figure 6-1. Typical Application Diagram Data transmission supports low-level encoding for ISO/IEC 15693, modified Miller for ISO/IEC 14443 A, high-bit-rate systems for ISO/IEC 14443, and Tag-it coding systems. Included with the data encoding is automatic generation of SOF, EOF, CRC, and parity bits.
  • Page 11 EN input high. The internal regulators are also automatically reconfigured every time the automatic regulator selection bit is set high (on the rising edge). Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 12 Automatic regulator setting; approximately 250-mV difference 0x0B Automatic regulator setting; approximately 350-mV difference 0x0B Automatic regulator setting; approximately 400-mV difference (1) x = Don't care Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 13 After the reader EN line is high, the other power modes are selected by control bits. Table 6-6 lists the power mode options and functions. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 14 EN2 low and EN high. Figure 6-4 shows an oscilloscope trace of chip enable to clock start with EN2 high and EN low. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 15 (Blue) to Crystal Start (Red)] Figure 6-3. Chip Enable to Clock Start, EN2 Low and EN High (Blue) to Start of System Clock (Red) Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 16: Receiver - Analog Section

    600 kHz to 1500 kHz for low pass). Following the band-pass filter is another gain-and- filtering stage with a nominal gain of 8 dB and with frequency characteristics identical to the first stage. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 17 The parity bits and CRC bytes are checked and also removed. The end result is clean or raw data, which is sent to the 12-byte FIFO register where it can be read by the external microcontroller system. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 18 Control register (address 0x09); available clock frequencies are 13.56 MHz, 6.78 MHz, or 3.39 MHz. Table 6-9 lists the recommendations for the reference crystal (HC49U). Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 19 00h, the pulse length is equal to the value of the register in 73.7-ns increments. This means the range of adjustment is 73.7 ns to 18.8 µs. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 20 MOD pin (pin 14). On the receive side, the application has direct access to the subcarrier signal (digitized RF envelope signal) on I/O_6 (pin 23). Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 21 Mode 1: Unframed raw ISO formatted data Packetization and Framing Mode 2: Full ISO with framing and error checking (typical mode) Figure 6-5. User-Configurable Modes Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 22: Register Descriptions

    Table 6-27 FIFO Registers 0x1C FIFO status Table 6-28 0x1D TX length byte1 Table 6-29 0x1E TX length byte2 Table 6-30 0x1F FIFO I/O register Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 23 Selects the V range: 5 V (4.3 V to 5 V) or 3 V (2.7 V to DD_RF vrs5_3 0 = 3-V operation (V 3.4 V) Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 24 RX ISO/IEC 14443 B high bit rate, 424 kbps (see Table 6-15) ISO/IEC 14443 B high bit rate, 848 kbps Tag-it Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 25 = 1, tm_st0 = 0: Beginning of RX SOF Tm_st0 tm_st1 = 1, tm_st0 = 1: End of RX SOF Tm_lengthD Tm_lengthC Tm_lengthB Timer length. MSB is B5. Tm_lengthA Tm_length9 Tm_length8 Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 26 755 µs for ISO/IEC 15693 NoResp3 1812 µs for ISO/IEC 15693 low data rate NoResp2 604 µs for Tag-it NoResp1 NoResp0 529 µs for all other protocols Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 27 Modulation Type and Percentage ASK 10% OOK (100%) ASK 7% Modulation depth. MSB is B2. ASK 8.5% ASK 13% ASK 16% ASK 22% ASK 30% Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 28 Unused Default is low. vrs2 vrs1 Voltage set. MSB is B2. vrs3_5 = L: VDD_RF, VDD_A, VDD_X range 2.7 V to 3.4 V vrs0 Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 29 Bit position of collision. MSB is B7. protocols, it shows the bit position of error, either frame, SOF-EOF, parity, or Col3 CRC error. Col2 Col1 Col0 Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 30 Number of complete byte bn[6] Middle nibble of complete bytes to be transmitted Txl5 Number of complete byte bn[5] Txl4 Number of complete byte bn[4] Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 31: Direct Commands From Mcu To Reader

    The transmission command must be sent first, followed by transmission length bytes, and then the FIFO data. The reader starts transmitting after the first byte is loaded into the FIFO. The CRC byte is included in the transmitted sequence. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 32 1.6 Vp, or an RSSI level of 5 or 6. The nominal relationship between the input RF peak level and the corresponding RSSI code is as follows. Receiver Input (mV 1200 1500 1800 2100 RSSI Level: Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 33: Reader Communication Interface

    When the SPI is selected, the unused I/O_2, I/O_1, and I/O_0 pins must be hardwired according to Table 6-32. At power up, the TRF7960 IC samples the status of these three pins and then enters one of the possible SPI modes (see Table 6-32).
  • Page 34: Parallel Interface Communication

    CLK is low. This condition resets the parallel interface, and the device is ready for a new communication sequence. The StopSmpl condition also terminates the direct mode. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 35 FIFO. The loading of TX Length Bytes and the FIFO can be done with a continuous-write command, because the addresses are sequential. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 36: Serial Interface Communication

    (a) When using slave select (SS), set the SS bit high. (b) When not using SS, the stop condition occurs when SCLK is high (see Figure 6-9). Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 37 All words must be 8 bits long with the MSB transmitted first. SCLK MOSI Figure 6-10. Serial – SPI Communication (Write Mode) Figure 6-11 shows the SPI read operation. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 38 The MOSI (serial data out) should not have any transitions (all high or all low) during the read cycle. Also, the SS* signal should be low during the whole write and read operation. Figure 6-12 shows the continuous read operation. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 39 If the number of bytes in the FIFO is n, the register value is (n – 1) number of bytes in FIFO register. For example, if 8 bytes are in the FIFO, the FIFO counter (bits B0 to B3 in register 0x1C) has the value 7. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 40 FIFO during reception. Transmission starts automatically after the first byte is written into the FIFO. Detailed Description Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 41: Applications, Implementation, And Layout

    Application Schematics Figure 7-1 shows a schematic for parallel communication. Copyright © 2017, Texas Instruments Incorporated Figure 7-1. Application Schematic for the TRF796x EVM (Parallel Mode) Applications, Implementation, and Layout Copyright © 2006–2017, Texas Instruments Incorporated...
  • Page 42 SLOU186G – AUGUST 2006 – REVISED MAY 2017 www.ti.com Figure 7-2 shows a schematic for SPI communication. Copyright © 2017, Texas Instruments Incorporated Figure 7-2. Application Schematic for the TRF796x EVM (SPI Mode) Applications, Implementation, and Layout Copyright © 2006–2017, Texas Instruments Incorporated...
  • Page 43: Device And Documentation Support

    A = Silicon revision Packaging Information Package or www.ti.com/package Distribution R = Large reel T = Small reel Figure 8-1. Device Nomenclature Device and Documentation Support Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TRF7960 TRF7961...
  • Page 44: Tools And Software

    The GUI that runs on the host PC for use with the TRF7960A evaluation module. Documentation Support The following documents describe the TRF7960 and TRF7961 devices. Copies of these documents are available on the Internet at www.ti.com. Receiving Notification of Document Updates To receive notification of documentation updates—including silicon errata—go to the product folder for...
  • Page 45: Glossary

    FeliCa is a trademark of Sony Corporation. Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 46: Mechanical, Packaging, And Orderable Information

    This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Mechanical, Packaging, and Orderable Information Copyright © 2006–2017, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links:...
  • Page 47 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing (4/5) TRF7960RHBR ACTIVE VQFN 3000 Green (RoHS CU NIPDAU Level-2-260C-1 YEAR -40 to 110 &...
  • Page 48 PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.
  • Page 49 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Reel Reel Pin1 Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant (mm) W1 (mm) TRF7960RHBR VQFN 3000 330.0 12.4 12.0 TRF7960RHBT VQFN 180.0 12.4...
  • Page 50 PACKAGE MATERIALS INFORMATION www.ti.com 27-Jul-2016 *All dimensions are nominal Device Package Type Package Drawing Pins Length (mm) Width (mm) Height (mm) TRF7960RHBR VQFN 3000 367.0 367.0 35.0 TRF7960RHBT VQFN 210.0 185.0 35.0 TRF7961RHBR VQFN 3000 367.0 367.0 35.0 TRF7961RHBT VQFN 210.0 185.0 35.0...
  • Page 52 GENERIC PACKAGE VIEW RHB 32 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 5 x 5, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224745/A www.ti.com...
  • Page 53 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2019, Texas Instruments Incorporated...

This manual is also suitable for:

Trf7961Trf7961rhbTrf7960rhb

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