Texas Instruments TRF7960 Manual page 27

Multiple-standard fully integrated 13.56-mhz rfid analog front end and data-framing reader system
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Table 6-20
describes the RX Wait Time register. This register defines the time after TX EOF when the RX
input is disregarded. The default is 0x1F and is reset at POR = H or EN = L and at each write to the ISO
Control register.
BIT
BIT NAME
FUNCTION
B7
Rxw7
B6
Rxw6
B5
Rxw5
B4
Rxw4
RX wait
B3
Rxw3
B2
Rxw2
B1
Rxw1
Table 6-21
describes the Modulator and SYS_CLK Control register. This register controls the modulation
depth, modulation input, and ASK/OOK pin control. The default is 0x11 and is reset at POR = H or EN = L
and at each write to the ISO Control register, except for the Clo1 and Clo0 bits.
Table 6-21. Modulator and SYS_CLK Control Register (Address = 09h)
BIT
BIT NAME FUNCTION
B7
Unused
1 = Enables external selection of ASK or OOK
B6
en_ook_p
modulation
B5
Clo1
SYS_CLK output frequency. MSB is B5.
B4
Clo0
1 = Enables analog output on the ASK/OOK pin
B3
en_ana
(pin 12)
B2
Pm2
B1
Pm1
Modulation depth. MSB is B2.
B0
Pm0
Copyright © 2006–2017, Texas Instruments Incorporated
Table 6-20. RX Wait Time Register (Address = 08h)
COMMENTS
Defines the time during which the RX input is ignored. Starts from the end of TX EOF.
RX wait range is 9.44 µs to 2407 µs (1 to 255), and step size is 9.44 µs.
Presets are:
293 µs for ISO/IEC 15693
66 µs for ISO/IEC 14443 A and B
180 µs for Tag-it
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SLOU186G – AUGUST 2006 – REVISED MAY 2017
COMMENTS
Valid only when ISO control register (0x01) is configured to direct
mode
Clo1
Clo0
SYS_CLK Output
0
0
Disabled
0
1
3.3 MHz
1
0
6.78 MHz
1
1
13.56 MHz
For test and measurement
Pm2
Pm1
Pm0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
TRF7960 TRF7961
TRF7960, TRF7961
Modulation Type and Percentage
ASK 10%
OOK (100%)
ASK 7%
ASK 8.5%
ASK 13%
ASK 16%
ASK 22%
ASK 30%
Detailed Description
27

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