AKM AKD4953-A Manual

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The AKD4953-A is an evaluation board for the AK4953 24bit CODEC with built-in PLL and MIC/HP/SPK

Amplifier. The AKD4953-A has the interface with AKM's A/D evaluation boards. Therefore, it's easy to

evaluate the AK4953. The AKD4953-A also has the digital audio interface and can achieve the interface with

digital audio systems via opt-connector.

̈ Ordering Guide

AKD4953-A ---

• Compatible with 2 types of interface

- Direct interface with AKM's A/D converter evaluation boards

- DIT/DIR with optical input/output

• BNC connector for an external clock input

• 10pin header for serial control interface

Digital

MIC

Mini

Jack

LIN

RIN

* Circuit diagram and PCB layout are attached at the end of this manual.

GENERAL DESCRIPTION

Evaluation board for AK4953

(Cable for connecting with printer port of IBM-AT compatible PC and control software

are packed with this. This control software does not operate on Windows NT.)

TVDD DVDD AVDD SVDD AGND

3.3V

1.8V

LIN1

RIN1

LIN2

RIN2

LIN3

RIN3

SPN

SPK

Figure 1. AKD4953-A Block Diagram

Evaluation board Rev.2 for AK4953

FUNCTION

3.3V

AK4953

SPP

HPL

HPR

- 1 -

AKD4953-A

REG

3.3V

REG

PORT4

(CTRL)

PORT3

(DSP)

AK4118A

(DIT/DIR)

External

Clock

[AKD4953-A]

Opt In

Opt Out

2010/04

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Summary of Contents for AKM AKD4953-A

Page 1 The AKD4953-A is an evaluation board for the AK4953 24bit CODEC with built-in PLL and MIC/HP/SPK Amplifier. The AKD4953-A has the interface with AKM’s A/D evaluation boards. Therefore, it’s easy to evaluate the AK4953. The AKD4953-A also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector.
Page 2 [AKD4953-A] ̈ Operation Sequence (1) Set up the power supply lines. (1-1) In case of using the regulator. <Default> SVDD-SEL AVDD-SEL TVDD-SEL VCC-SEL Default Setting Name of Color Using Jack for regulator (3.3V output : AVDD ,SVDD) AVDD orange Open...
Page 3: Evaluation Mode
[AKD4953-A] ̈ Evaluation mode In case of using the AK4118A when evaluating the AK4953, both the AK4953 and AK4118A’s audio interface formats must be matched. Reter to the datasheet for AK4953’s audio interface format, and Table 3 for AK4118’s audio interface format.
Page 4 [AKD4953-A] (1) Evaluation of A/D using DIT of AK4118A. (1-1) Setting with External Slave Mode X1 (X’tal) and PORT2 (DIT) are used. Nothing should be connected to PORT1 (DIR) and PORT3 (DSP). JP23 (M/S) should be set to “Slave”. In addition, Registers of the AK4953 should be set to “EXT Slave Mode”.
Page 5 [AKD4953-A] (3) Evaluation of A/D, D/A using PORT3 (DSP). PORT3 (DSP) is used. Nothing should be connected to PORT1 (DIR) and PORT2 (DIT). (3-1) Setting with PLL Master Mode The master clock is input from MCKI of PORT3 (DSP). An internal PLL circuit generates MCKO, BICK, and LRCK.
Page 6 [AKD4953-A] (3-2) Setting with PLL Slave Mode A reference clock of PLL is selected among the input clocks supplied from PORT3 (DSP) to MCKI, BICK or LRCK pin. The required clock to the AK4953 is generated by an internal PLL circuit.
Page 7 [AKD4953-A] (3-2-2) PLL Reference Clock: BICK pin Registers of the AK4953 should be set to “PLL Slave Mode” (Reference Clock = BICK). AK4953 DSP or μP MCKO MCKI 32fs, 64fs BCLK BICK LRCK LRCK SDTO SDTI SDTO SDTI Figure 4. PLL Slave Mode 2(PLL Reference Clock: BICK pin) Evaluation using DIR (Optical Link) of AK4118A PORT1 (DIR) is used.
Page 8 [AKD4953-A] (3-3) Setting with External Slave Mode MCLK, BICK, LRCK, and SDTI are input from PORT3 (DSP). JP23 (M/S) should be set to “Slave”. In addition, Registers of the AK4953 should be set to “EXT Slave Mode”. AK4953 DSP or μP...
Page 9 [AKD4953-A] (4-2) Setting with PLL Slave Mode BICK and LRCK are generated on the AKD4953-A by dividing MCKO from the AK4953. The generated BICK and LRCK is input to the AK4953. JP23 (M/S) should be set to “Slave”. In addition, Registers of the AK4953 should be set to “PLL Master Mode”...
Page 10 [AKD4953-A] (4-3-2) In case of using the clock divider on the board In case of supplying MCLK from J11 (EXT) ( MCLK=256fs, BICK=64fs) The jumper pins should be set as follows. JP14 JP15 JP16 JP17 JP18 JP19 MCLK MKFS BGFS...
Page 11: Dip Switch Setup
[AKD4953-A] ̈ DIP Switch Set Up [S1] (SW DIP-6): Mode setting of the AK4953 and AK4118A. Name ON (“H”) OFF (“L”) Default DIF2 AK4118A Audio Format Setting DIF1 See Table 4 DIF0 OCKS1 AK4118A Master Clock Setting : See Table 5...
Page 12 [AKD4953-A] ̈ Jumper Pins Set Up Main Board [JP1] (GND): Analog ground and Digital ground OPEN: Separated. SHORT: Common. (The connector “DGND” can be open.) <Default> [JP16] (MKFS): MCLK Frequency 256fs: 256fs <Default> 512fs: 512fs 1024fs: 1024fs 384fs: 384fs MCKO:...
Page 13: Serial Control
[AKD4953-A] ̈ Serial Control The AKD4953 can be connected to the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (CTRL) with PC by 10 wire flat cable packed with the AKD4953. Table 6 shows switch and jumper settings for serial control.
Page 14: Analog Input/Output Circuits
[AKD4953-A] ̈ Analog Input/Output Circuits (1) Input Circuits LIN1 LIN1/RIN1 RIN1 LIN2 LIN2 (short) (short) LIN3 LIN3 LIN_SEL RIN2 RIN2 (short) (short) RIN3 RIN3 RIN_SEL Figure 7. LIN1/RIN1, LIN2/RIN2, LIN3/RIN3 Input Circuits (1-1) LIN1/RIN1Input Circuit <Default> LIN1/RIN1 is input from J1.
Page 15 [AKD4953-A] (1-3) LIN3/RIN3 Input Circuit LIN3/RIN3 is input from J2/J3. LIN-SEL RIN-SEL LIN2 RIN2 LIN3 RIN3 (1-4) Digital Mic Input Circuit JP102 JP103 DMCLK RIN1 DMDAT LIN1 <KM101802> 2010/04 - 15 -...
Page 16 [AKD4953-A] (2) Output Circuits (2-1) HPL/HPR Output Circuit JP12 (short) 0.22u (short) HP/LINE JP13 (short) 0.22u (short) Figure . HPL/HPR Output Circuit (2-1-1) In case that HPL/HPR is output from J7 and J8. <Default> JP12 JP13 (2-2-2) In case that HPL/HPR is output from J9.
Page 17 (2-3) SPP/SPN Output Circuit <Default> (short) SPK/MOUT (open) (open) JP26 (open) (open) (short) Figure . SPP/SPN Output Circuit SPP/SPN is output from J10. * AKM assumes no responsibility for the trouble when using the above circuit examples. <KM101802> 2010/04 - 17 -...
Page 18: Evaluation Board And Control Soft Settings
10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This control soft does not support the Windows NT.
Page 19: Operation Overview
[AKD4953-A] Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window.
Page 20 [AKD4953-A] Tab Functions 1. [Function]: Function control This tab is for function control. Each operation is executed by the function buttons on the left side of the screen. Figure 11.Window of [Function] <KM101802> 2010/04 - 20 -...
Page 21 [AKD4953-A] 1-1. System Clock, Audio I/F Setting When [System Clock Audio I/F] button is clicked, the window as shown in Figure 12 opens. This window is for System Clock and Audio I / F Setting. Refer to the datasheet for register settings of the AK4953.
Page 22: Alc Setting
[AKD4953-A] 1-2. ALC Setting When [ALC Setting] button is clicked, the window as shown in Figure 13 opens. This window is for ALC setting. Refer to the datasheet for register settings of the AK4953. Figure 13. Window of [ALC Setting] <KM101802>...
Page 23: Volume Setting
[AKD4953-A] 1-3. Volume Setting When [Volume Setting] button is clicked, the window as shown in Figure 14 opens. This window is for Volume setting. Refer to the datasheet for register settings of the AK4953. Register map Figure 14. Window of [Volume Setting] The volume can be controlled by slide bars.
Page 24: Beep Setting
[AKD4953-A] Volume Control by Pull-down Menu Slide bar is moved to the selected value Figure 15. Window of [Volume] The volume can also be changed by writing a value in a dialog box. The slide bar is moved to the value that written in the dialog box.
Page 25: Digital Filter Setting
[AKD4953-A] 1-5. Digital Filter Setting A calculation of a coefficient of Digital Programmable Filters such as HPF and EQ filters, a register writing and a frequency response checking of HPF and EQ filter can be made. When [Digital Filter] button is clicked, the window as shown in Figure 17 opens.
Page 26: Parameter Setting
[AKD4953-A] 1-5-1. parameter Setting (1) Please set a parameter of each Filter. Parameter Function Setting Range 7350Hz ≤ fs ≤ 48000Hz Sampling Rate Sampling frequency (fs) fs/10000 ≤ Cut Off Frequency Cut Off Frequency High pass filter cut off frequency ≤...
Page 27 [AKD4953-A] 1-5-2. A calculation of a register A register set value is displayed when push a [Register Setting] button. When a value out of a setting range is set, error message is displayed, and a calculation of register setting is not carried out.
Page 28 [AKD4953-A] 1-5-3. Indication of a frequency characteristic A frequency characteristic is displayed when push a [Frequency Response] button. Then, a register set point is also updated. Change "Frequency Range", and indication of a frequency characteristic is updated when push a [UpDate] button.
Page 29 [AKD4953-A] Setting of center frequency: 4400Hz, 5000Hz, 5400Hz / Band Width: 200Hz(3 band common) Figure 21. When there is no center frequency revision Setting of center frequency: 4400Hz, 5000Hz, 5400Hz / Band Width : 200Hz(3 band common) Figure 22. When there is a center frequency revision <KM101802>...
Page 30: Reg]: Register Map
[AKD4953-A] 2. [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Page 31 [AKD4953-A] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.
Page 32: Tool]: Testing Tools
[AKD4953-A] 3. [Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. Figure 24.Window of [Tool] <KM101802> 2010/04 - 32 -...
Page 33 [AKD4953-A] Dialog Boxes 1. [All Req Write]: All Req Write dialog box Click [All Reg Write] button in the main window to open register setting files. Register setting files saved by [SAVE] button can be applied. Figure 25. Window of [All Reg Write] [Open (left)]: Selecting a register setting file (*.akr).
Page 34 [AKD4953-A] 2. [Data R/W]: Data R/W Dialog Box Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Figure 26. Window of [Data R/W] Address Box: Input data address in hexadecimal numbers for data writing.
Page 35: Sequence Setting
[AKD4953-A] 3. [Sequence]: Sequence Dialog Box Click [Sequence] button to open register sequence setting dialog box. Register sequence can be set in this dialog box. Figure 27. Window of [Sequence] Sequence Setting Set register sequence by following process bellow. (1) Select a command Use [Select] pull-down box to choose commands.
Page 36: Control Buttons
[AKD4953-A] (2) Input sequence [Address]: Data address [Data]: Writing data [Mask]: Mask [Data] box data is ANDed with [Mask] box data. This is the actual writing data. When Mask = 0x00, current setting is hold. When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.
Page 37 [AKD4953-A] 4. [Sequence(File)]: Sequence Setting File Dialog Box Click [Sequence(File)] button to open sequence setting file dialog box. Those files saved in the “Sequence setting dialog” can be applied in this dialog. Figure 28. Window of [Sequence(File)] [Open (left)]: Opening a sequence setting file (*.aks).
Page 38: Measurement Results
[AKD4953-A] MEASUREMENT RESULTS [Measurement condition] Measurement unit : Audio Precision, System two Cascade MCKI : 256fs (11.2896MHz,24.576MHz) BICK : 64fs : 44.1kHz,96kHz : 24bit Measurement Mode : EXT Slave Mode Power Supply : SVDD=AVDD=TVDD=3.3V, DVDD=1.8V Input Frequency : 1kHz Measurement Frequency...
Page 39: Revision History
” When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei Microdevices Corporation (AKM) or authorized distributors as to current status of the products. ” AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein.
Page 40 (Short) (Short) VSS3 VSS1 JP109 JP109 MCKO MCKO R110 R110 CN107 CN107 - 40 - Title Title Title AKD4953-A-36QFN-SUB AKD4953-A-36QFN-SUB AKD4953-A-36QFN-SUB Size Size Size Document Number Document Number Document Number AK4953 AK4953 AK4953 Date: Date: Date: Tuesday, April 20, 2010...
Page 41 (Open) 4953_SDTO LOUT 4953_LRCK ROUT 4953_BICK DVDD LIN4 TVDD 12pin 12pin 12pin 12pin 12pin 12pin Title Title Title AKD4953-A AKD4953-A AKD4953-A Size Size Size Document Number Document Number Document Number AK4953 AK4953 AK4953 Date: Date: Date: Sheet Sheet Sheet Thursday, January 14, 2010...
Page 42 JP26 JP26 DGND1 DGND1 (open) (open) (open) (open) T45_BK T45_BK (short) (short) Title Title Title AKD4953-A AKD4953-A AKD4953-A Size Size Size Document Number Document Number Document Number Power Supply, I/O Power Supply, I/O Power Supply, I/O Date: Date: Date: Sheet...
Page 43 0.1u 0.1u 0.1u U7 74HC14 U7 74HC14 LOAD 74AC163 74AC163 0.1u 0.1u 74HCU04 74HCU04 0.1u 0.1u Title Title Title AKD4953-A AKD4953-A AKD4953-A Size Size Size Document Number Document Number Document Number CLOCK CLOCK CLOCK Date: Date: Date: Sheet Sheet Sheet...
Page 44 SDTO 0.1u 0.1u 0.1u 0.1u 4114_LRCK 4114_MCKO PORT2 PORT2 0.1u 0.1u TOTX141 TOTX141 Title Title Title AKD4953-A AKD4953-A AKD4953-A Size Size Size Document Number Document Number Document Number DIR/DIT DIR/DIT DIR/DIT Date: Date: Date: Thursday, January 14, 2010 Thursday, January 14, 2010...
Page 45 CDTI/SDA CCLK/SCI CDTI/SDA CDTO/SDA(ACK) CTRL CTRL VCCA VCCB 0.1u 0.1u VCCB 0.1u 0.1u 74AVC8T245 74AVC8T245 Title Title Title AKD4953-A AKD4953-A AKD4953-A 0.1u 0.1u Size Size Size Document Number Document Number Document Number LOGIC LOGIC LOGIC 74LVC07 74LVC07 Date: Date: Date:...

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