Page 1
AK4128A-A Evaluation Board Rev.0 GENERAL DESCRIPTION The AKD4128A-A is an evaluation board for AK4128A, the digital sample rate converter. The AKD4128A-A has the digital audio interface and can achieve the interface with digital audio system via optical or coaxial connector. Ordering guide...
[AKD4128A-A] Operation sequence 1) Set up the power supply lines. Name of Color Used for Open / Connect Default jack of jack Voltage Setting Regulator T1,T2,T3: Should be always connected AVDD and DVDD of When default setting. Orange AK4128A, AK4114, Digital...
Page 3
[AKD4128A-A] 2) Set up the jumper pin of power supply unit. (1).Setup the AVDD of AK4128A. a).When using AVDD jack. b).When using Regulator. J P1 AVDD AVDD R EG AVDD-SEL AVDD -SEL (2).Setup the DVDD of AK4128A. a).When using DVDD jack.
Page 4
[AKD4128A-A] 3) Set up the evaluation mode, jumper pins. (See the followings.) (1). Setting for Input port (1)-1. When using DIR function of AK4114 (U2,U3,U4 and U5) (1)-2. When using all clocks are fed through the 10pin port (2). Setting for Output port (2)-1.
Page 5
[AKD4128A-A] Set up the evaluation mode, jumper pins. (1). Setting for Input port (1)-1. When using DIR function of AK4114 (U2,U3,U4 and U5) When using J1-4(COAX) and PORT6-9(OPT), nothing should be connected to PORT1-4. (1)-1-1. Setup the RX. (a) Select to Optical jack (Default)
Page 6
[AKD4128A-A] (1)-1-3. Setup the SDTI1, SDTI2, SDTI3 and SDTI4. Select to input signal for SDTI1, SDTI2, SDTI3 and SDTI4 of AK4128A(U1). (a). When using “Synchronous Mode” (INAS pin = “L”). (Default) SDTI1-SEL SDTI2-SEL SDTI3-SEL SDTI4-SEL Asynchronous Asynchronous Asynchronous Asynchronous Synchronous...
Page 7
[AKD4128A-A] (1)-2. When using all clocks are fed through the 10pin port (1)-2-1. Setup the RX. When using PORT1-4, nothing should be connected to J1-4 (COAX) and PORT6-9 (OPT). (1)-2-2. Setup the IBICK1-4, ILRCK1-4 and SDTI1-4. When using PORT1-4, nothing should be connected to J1-4 (COAX) and PORT6-9 (OPT).
Page 8
[AKD4128A-A] (2). Setting for Output port (2)-1. When using DIT function of AK4114 (U6) (2)-1-1. Setup the TX. (a) Select to Optical jack (Default) (b) Select to BNC jack J P 4 4 J P 4 4 O U T P U T S E L O U T P U T S E L (2)-1-2.
Page 9
[AKD4128A-A] (2)-1-3. Setup the OBICK, OLRCK and SDTO. (2)-1-3-1.When using OBICK, OLRCK of AK4114(U6), and SDTO of AK4128A(U1). J P 4 8 J P 4 9 J P 5 0 O B IC K O L R C K S D T O...
Page 10
[AKD4128A-A] (2)-1-4. Selection of SDTO1, SDTO2, SDTO3 and SDTO4. (a) Select to SDTO1 (b)Select to SDTO2 (c)Select to SDTO3 (d)Select to SDTO4 J P 1 7 J P 1 7 J P 1 7 J P 1 7 S D T O - S E L...
Page 11
[AKD4128A-A] (2)-2-2-2. When using OBICK, OLRCK and SDTO of AK4128A(U1). J P 4 8 J P 4 9 J P 5 0 O B IC K O L R C K S D T O JP46 JP47 DIT-OBICK SEL DIT-OLRCK SEL...
Page 12
[AKD4128A-A] (3). Other jumper pins setup. [ JP9 (SEL1) ]:The selection of input signal to IMCLK pin. IMCLK :Connect to MCLK signal of DIR or 10 pin PORT. (Default) :Connect to GND [ JP10 (ILRCK2-SEL) ]:The selection of input signal to ILRCK2 pin.
Page 13
[AKD4128A-A] [ JP31 (EXT-CLK) ]:The selection of J7(EXT-CLK) connector. OPEN :J7(EXT-CLK) connector is use. SHORT :J7(EXT-CLK) connector is not use. (Default) * If “JP31(EXT-CLK)” is set to “OPEN”, JP27 is set to “EXT”. [KM104301] 2010/09 - 13 -...
Page 14
[AKD4128A-A] Setup the DIP SW. (1). Setup the AK4128A(U1). (1)-1. SW3 setting Upper-side is “H” and lower-side is “L”. Name ON (“H”) OFF (“L”) Default IDIF2 Audio Interface Format Setting for Input PORT IDIF1 Refer to Table 3 IDIF0 Serial Control Mode...
Page 15
[AKD4128A-A] (1)-2. SW3 setting Upper-side is “H” and lower-side is “L”. Name ON (“H”) OFF (“L”) Default OBIT1 Output PORT Audio Interface Format Setting 2 OBIT0 Refer to Table 6 TDM mode Stereo mode Clock Select or Mode Select pin for Output PORT...
Page 17
[AKD4128A-A] X’tal Mode XTI pin XTO pin MCKO pin Oscillator Pull down to 6-channel Power-down Hi-z VSS2-5 mode Input Hi-z Pull down to VSS2-5 4-channel Power-down Hi-z mode Input Pull down to Power-down Hi-z VSS2-5 8-channel mode Normal Normal Input...
Page 18
[AKD4128A-A] (2). Setup the AK4114 (U2,U3,U4,U5,U6) (2)-1. SW6(U2), SW7(U3), SW8(U4), SW9(U5) setting. Upper-side is “H” and lower-side is “L”. Name ON (“H”) OFF (“L”) Default DIR1-OCKS1 Master Clock Frequency Setting Refer to Table 17 DIR1-OCKS0 DIR1-DIF0 24bit, I S Compatible 24bit, Left justified Table 13.
Page 19
[AKD4128A-A] (2)-2. SW16(U6) setting. Upper-side is “H” and lower-side is “L”. SW16 Name ON (“H”) OFF (“L”) Default DIT-OCKS1 Master Clock Frequency Setting Refer to Table 19 DIT-OCKS0 DIT-DIF2 Audio Interface Format Setting DIT-DIF1 Refer to Table 20 DIT-DIF0 Table 18. Master Clock Frequency Setting...
[AKD4128A-A] The function of the toggle SW Upper-side is “H” and lower-side is “L”. [SW1] (AK4128-SMUTE) :Soft mute of AK4128A. When using Soft mute function, SW1 is “H”. [SW2] (AK4128-PDN) :Resets the AK4128A. Keep “H” during normal operation. The AK4128A should be resets once bringing “L” upon power-up.
[AKD4128A-A] Serial Control The AK4128A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT1 (CTRL) with PC by 10 wire flat cable packed with the AKD4128A-A. AKD4128A-A 9 PORT 11 10pin Header 2 uP-I/F 10 Connect ...
Page 22
10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This control soft does not support the Windows NT.
Page 23
[AKD4128A-A] ■Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window.
Page 24
[AKD4128A-A] ■Dialog Boxes [All Req Write] Click [All Reg Write] button in the main window to open register setting files. Register setting files saved by [SAVE] button can be applied. Figure 4. Window of [ All Reg Write] [Open (left)] : Selecting a register setting file (*.akr).
Page 25
[AKD4128A-A] [Data R/W] Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Figure 5. Window of [ Data R/W ] Address Box : Input data address in hexadecimal numbers for data writing.
[AKD4128A-A] [Sequence] Click [Sequence] button to open register sequence setting dialog box. Register sequence can be set in this dialog box. Figure 6. Window of [ Sequence ] Sequence Setting Set register sequence by following process bellow. (1)Select a command Use [Select] pull-down box to choose commands.
[AKD4128A-A] Valid boxes for each process command are shown bellow. · No_use : None · Register : [Address], [Data], [Interval] · Reg(Mask) : [Address], [Data], [Mask], [Interval] · Interval : [Interval] · Stop : None · End : None Control Buttons The function of Control Button is shown bellow.
Page 28
[AKD4128A-A] [Sequence(File)] Click [Sequence(File)] button to open sequence setting file dialog box. Those files saved in the “Sequence setting dialog” can be applied in this dialog. Figure 7. Window of [ Sequence(File) ] [Open (left)] : Opening a sequence setting file (*.aks).
[AKD4128A-A] 1. [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
Page 30
[AKD4128A-A] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”.
[AKD4128A-A] 2.[Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. Figure 11. Window of [ Tool] [KM104301] 2010/09 - 31 -...
Page 32
[AKD4128A-A] [Repeat Test]: Repeat Test Dialog Click [Repeat Test] button to open repeat test setting dialog box. Figure 12. Window of [ Repeat Test] [Loop Setting]: Loop Setting Dialog Click [Loop Setting] button to open loop setting dialog box. Figure 13. Window of [ Loop]...
AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
Page 39
TP11 TP11 ILRCK4 ILRCK4 ILRCK4 ILRCK4-SEL ILRCK4-SEL 64pin_1 64pin_1 0.1u 0.1u 64pin_2 64pin_2 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number AK4128A AK4128A AK4128A Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 40
DSP1 BNC-R-PC BNC-R-PC DIR1-MCKO EXT-CLK IMCLK-SEL IMCLK-SEL DIR1-BICK JP31 JP31 EXT-CLK DIR1-LRCK DIR1-SDTI1 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number DIR1 DIR1 DIR1 Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 41
0.1u 0.1u JP34 JP34 ILRCK2 C120 C120 C119 C119 D3.3V-1 DIR2-BICK DIR2-LRCK DIR2-SDTI2 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number DIR2 DIR2 DIR2 Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 42
0.1u 0.1u JP38 JP38 ILRCK3 C128 C128 C127 C127 D3.3V-2 DIR3-BICK DIR3-LRCK DIR3-SDTI3 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number DIR3 DIR3 DIR3 Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 43
0.1u 0.1u JP42 JP42 ILRCK4 C135 C135 C134 C134 D3.3V-2 DIR4-BICK DIR4-LRCK DIR4-SDTI4 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number DIR4 DIR4 DIR4 Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 44
DIT-OBICK SEL DIT-OBICK SEL JP47 JP47 DIT-Slave DIT-OLRCK-S DIT-Master DIT-OLRCK-M DIT-OLRCK SEL DIT-OLRCK SEL DIT-SDTO Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 45
74LVC541A 74LVC541A DIR4-SDTI4 SDTI4 DIR4-LRCK ILRCK4 DIR4-BICK IBICK4 C140 C140 0.1u 0.1u D3.3V-2 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number Buffer Buffer Buffer Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 46
0.1u 0.1u 0.1u D3.3V-2 HSU119 HSU119 SW14 SW14 ATE1D-2M3 ATE1D-2M3 DIT-PDN 0.1u 0.1u Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number LOGIC LOGIC LOGIC Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 47
DIT-DIF0 D3.3V-2 DIT-DIF0 DIT-DIF1 DIT-DIF1 DIT-DIF2 DIT-DIF2 DIT-OCKS0 DIT-OCKS0 DIT-OCKS1 DIT-OCKS1 Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number Date: Date: Date: Tuesday, August 24, 2010 Tuesday, August 24, 2010 Tuesday, August 24, 2010...
Page 48
0.1u D3.3V-2 D3.3V-2 D3.3V-2 SEL D3.3V-2 SEL D3.3V-2 LT1117-3.3 LT1117-3.3 0.1u 0.1u 0.1u 0.1u Title Title Title AKD4128A-A AKD4128A-A AKD4128A-A Size Size Size Document Number Document Number Document Number Power Supply Power Supply Power Supply Date: Date: Date: Tuesday, August 24, 2010...
Need help?
Do you have a question about the AKD4128A-A and is the answer not in the manual?
Questions and answers