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AKM AK4621 Quick Start Manual

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The AKD4621-B is an evaluation board for the AK4621, the 24Bit A/D & D/A converter. The AKD4621-B
can evaluate A/D converter and D/A converter separately in addition to loopback mode (A/DD/A). The
AKD4621-B also has the digital audio interface and can achieve the interface with digital audio systems
via opt-connector.
 Ordering guide
AKD4621-B
 Digital interface
DIT (AK4114): optical or BNC
-
-
DIR (AK4114): optical or BNC
 10pin header for serial control interface
LIN
RIN
LOUT
ROUT
<KM100803>
GENERAL DESCRIPTION
---
Evaluation board for AK4621
(Cable for connecting with printer port of IBM-AT compatible PC
and control software are packed with this. This control software
does not operate on Windows NT.)
-15V
+15V
R egulator
Input
Buffer
Output
Buffer
Figure 1. AKD4621-B Block Diagram
* Circuit diagram are attached at the end of this manual.
AK4621 Evaluation board Rev.3
FUNCTION
AGND
DGND
AK4621
- 1 -
AKD4621-B
BNC
Opt In
AK4114
(DIR&DIT)
Opt Out
BNC
10pin Header
C ontrol Data
[AKD4621-B]
2022/05

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Summary of Contents for AKM AK4621

  • Page 1 AK4621 Evaluation board Rev.3 GENERAL DESCRIPTION The AKD4621-B is an evaluation board for the AK4621, the 24Bit A/D & D/A converter. The AKD4621-B can evaluate A/D converter and D/A converter separately in addition to loopback mode (A/DD/A). The AKD4621-B also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector.

  • Page 2: Operation Sequence

    Table 1. Set up of the power supply lines 2) Set up the evaluation modes, jumper pins and DIP switch. (See the followings.) 3) Power on The AK4621 should be reset once bringing SW2 (PDN) “L” upon power-up. <KM100803> 2022/05...

  • Page 3: Evaluation Modes

    Table 3. Sampling Speed & Master clock Frequency in serial mode * In serial mode, SW1-4 (DFS0), SW1-6 (CKS1) and SW1-7 (CSK0) should be always “OFF”, and DFS1, DFS0, CKS1, CKS0 and CMODE bits in the AK4621 should be set via the printer port (PORT3). <KM100803>...
  • Page 4 [AKD4621-B] 1-2) AK4114’s master clock mode & reference X’tal frequency SW3-6 SW3-7 Mode X'tal Clock source SDTO (CM1) (CM0) X'tal DAUX (Default) Table 4. AK4114’S Clock Operation Mode SW3-1 SW3-2 X’tal Frequency (XTL1) (XTL0) 24.576MHz (Default) Table 5. Reference X’tal frequency 1-3) Set up the digital filter a) Parallel mode (Default) SW1-2...
  • Page 5 Table 10. Sampling Speed & Master clock Frequency in serial mode * In serial mode, SW1-4 (DFS0), SW1-6 (CKS1) and SW1-7 (CSK0) should be always “OFF”, and DFS1, DFS0, CKS1, CKS0 and CMODE bits in the AK4621 should be set via the printer port (PORT3). <KM100803>...
  • Page 6 SW1-2 Digital Filter (SDFIL) Minimum Delay Sharp Roll-off Table 13. Digital Filter Selection in parallel mode b) Serial mode Set up the register of the AK4621 via the pint port (PORT3). SW1-2 SDAD SLOW Digital Filter (SDFIL) Sharp Roll-off Slow Roll-off Minimum Delay Table 14.
  • Page 7 3) Evaluation of A/D using DIT. (Optical link) DIT generates audio bi-phase signal from received data and which is output through optical connector (PORT2). It is possible to connect AKM’s D/A converter evaluation boards on the digital-amplifier which equips DIR input.
  • Page 8 * In serial mode, SW1-4 (DFS0), SW1-6 (CKS1) and S1-7 (CSK0) should be always “OFF”, and DFS1, DFS0, CKS1, CKS0 and CMODE bits in the AK4621 should be set via the printer port (PORT3). 3-3) AK4114’s master clock mode & reference X’tal frequency 3-3-1) PLL is used as clock source Synchronized signal should be set via PORT1 (optical) or J6 (BNC).
  • Page 9 [AKD4621-B] 3-4) Set up the digital filter a) Parallel mode (Default) SW1-2 Digital Filter (SDFIL) Short Delay Sharp Roll-off (Default) Table 22. Digital Filter Selection in parallel mode b) Serial mode SW1-2 SDAD Digital Filter (SDFIL) Sharp Roll-off Short Delay Table 23.
  • Page 10 [AKD4621-B]  Set up of DIP Switch: SW1, SW3 1) Set-up of SW1 (Mode set-up of AK4621) 1-1) Audio data format in parallel mode Mode SDTO SDTI LRCK BICK (SW1-5) 48fs 24bit MSB Justified (Default) 24bit MSB Justified 48fs S Compatible S Compatible Table 24.

  • Page 11: Serial Control Mode

    However, “L” must be input once after power supply is done.  Serial control mode The AK4621 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3 (CR-I/F) with PC by 10-wire flat cable packed with the AKD4621-B.
  • Page 12 Analog Input Buffer Circuit The AK4621 can accept input voltages from AGND to AVDD. The input signal range scales with the VREF voltage and is nominally 2.82Vpp (VREF = 5V). Figure 3 shows an input buffer circuit example. This is a fully differential input buffer circuit with an inverted amplifier (fc=370KHz,gain: 10dB).
  • Page 13 The differential output circuit (2nd order LPF,fc=182KHz,Q=0.637,G=+3.9dB) and LPF(1st order LPF, fc=284KHz, G=-0.84dB) is implemented on board. The differential outputs of AK4621 is buffered by non-inverted circuit and output via Cannon connector (differential output). LPF adds differential outputs. NJM5534D is used for op-amp on this board that has low noise and high voltage torelance characteristics.

  • Page 14: Control Soft Manual

    10pin header. When running this control soft on the Windows 2000/XP, the driver which is included in the CD must be installed. Refer to the “Driver Control Install Manual for AKM Device Control Software” for installing the driver. When running this control soft on the windows 95/98/ME, driver installing is not necessary. This control soft does not support the Windows NT.
  • Page 15 [AKD4621-B] ■ Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window.

  • Page 16: [Reg]: Register Map

    [AKD4621-B] [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red). Button Up indicates “L”...
  • Page 17 [AKD4621-B] [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box. When checking the checkbox, the register will be “H” or “1”, when not checking the register will be “L” or ”0”. Click [OK] to write setting value to the registers, or click [Cancel] to cancel this setting.

  • Page 18: [Tool]: Testing Tools

    [AKD4621-B] [Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. Figure 9. Window of [ Tool] <KM100803> 2022/05 - 18 -...
  • Page 19 [AKD4621-B] [Repeat Test]: Repeat Test Dialog Click [Repeat Test] button to open repeat test setting dialog box. Figure 10. Window of [ Repeat Test] <KM100803> 2022/05 - 19 -...
  • Page 20 [AKD4621-B] [Loop Setting]: Loop Setting Dialog Click [Loop Setting] button to open loop setting dialog box. Figure 11. Window of [ Loop] <KM100803> 2022/05 - 20 -...
  • Page 21 [AKD4621-B] Measurement Results [Measurement condition]  Measurement unit : Audio Precision System two Cascade (AP2)  MCLK : 512fs (fs = 48kHz), 256fs (fs = 96kHz), 128fs (fs = 192kHz)  BICK : 64fs  fs : 48kHz, 96kHz, 192kHz ...
  • Page 22 [AKD4621-B] 2. DAC fs=48kHz Results Parameter Input signal Measurement filter L ch R ch S/(N+D) 1kHz, -1dB 20kHzLPF 99.8 100.2 S/(N+D) 1kHz, -60dB 20kHzLPF 52.7 52.7 1kHz, -60dB 22kHzLPF, A-weighted 114.8 114.8 “0” data 22kHzLPF, A-weighted 115.0 114.9 fs=96kHz Results Parameter Input signal Measurement filter...
  • Page 23 [AKD4621-B] 3. PLOT DATA 3.1 ADC (fs=48kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 12. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 13. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 23 -...
  • Page 24 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 14. FFT (Noise Floor) -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 -140 -120 -100 Figure 15. THD+N vs. Input level (fin=1kHz) <KM100803> 2022/05 - 24 -...
  • Page 25 [AKD4621-B] -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 Figure 16. THD +N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 Figure 17. Linearity (fin=1kHz) <KM100803> 2022/05 - 25 -...
  • Page 26 [AKD4621-B] -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.1 -1.2 -1.3 -1.4 -1.5 -1.6 -1.7 -1.8 -1.9 Figure 18. Frequency Response(Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135...
  • Page 27 [AKD4621-B] 3.2 ADC (fs=96kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 20. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 21. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 27 -...
  • Page 28 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 22. FFT (Noise Floor) -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 -140 -120 -100 Figure 23. THD +N vs. Input level (fin=1kHz) <KM100803> 2022/05 - 28 -...
  • Page 29 [AKD4621-B] -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 Figure 24. THD +N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 Figure 25. Linearity (fin=1kHz) <KM100803> 2022/05 - 29 -...
  • Page 30 [AKD4621-B] -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.1 -1.2 -1.3 -1.4 -1.5 -1.6 -1.7 -1.8 -1.9 Figure 26. Frequency Response(Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135...
  • Page 31 [AKD4621-B] 3.3 ADC (fs=192kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 28. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 29. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 31 -...
  • Page 32 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 30. FFT (Noise Floor) -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 -140 -120 -100 Figure 31. THD+N vs. Input level (fin=1kHz) <KM100803> 2022/05 - 32 -...
  • Page 33 [AKD4621-B] -100 -102 -104 -106 -108 -110 -112 -114 -116 -118 -120 Figure 32. THD+N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 Figure 33. Linearity (fin=1kHz) <KM100803> 2022/05 - 33 -...
  • Page 34 [AKD4621-B] -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1.1 -1.2 -1.3 -1.4 -1.5 -1.6 -1.7 -1.8 -1.9 Figure 34. Frequency Response(Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135...
  • Page 35 [AKD4621-B] 3.4 DAC (fs=48kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 36. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 37. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 35 -...
  • Page 36 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 38. FFT (Noise Floor) -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 dBFS Figure 39. THD+N vs. Input level (fin=1kHz) <KM100803>...
  • Page 37 [AKD4621-B] -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 Figure 40. THD +N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 dBFS Figure 41. Linearity (fin=1kHz) <KM100803>...
  • Page 38 [AKD4621-B] -0.2 -0.4 -0.6 -0.8 -1.2 -1.4 -1.6 -1.8 -2.2 -2.4 -2.6 -2.8 Figure 42. Frequency Response (Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135 -137.5 -140 Figure 43.
  • Page 39 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 100k Figure 44. Out-of-band Noise <KM100803> 2022/05 - 39 -...
  • Page 40 [AKD4621-B] 3.5 DAC (fs=96kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 45. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 46. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 40 -...
  • Page 41 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 47. FFT (Noise Floor) -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 dBFS Figure 48. THD +N vs. Input level (fin=1kHz) <KM100803>...
  • Page 42 [AKD4621-B] -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 Figure 49. THD +N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 dBFS Figure 50. Linearity (fin=1kHz) <KM100803>...
  • Page 43 [AKD4621-B] -0.2 -0.4 -0.6 -0.8 -1.2 -1.4 -1.6 -1.8 -2.2 -2.4 -2.6 -2.8 Figure 51. Frequency Response (Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135 -137.5 -140 Figure 52.
  • Page 44 [AKD4621-B] 3.6 DAC (fs=192kHz) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 53. FFT (fin=1kHz, Input Level=-1dBFS) -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 54. FFT (fin=1kHz, Input Level=-60dBFS) <KM100803> 2022/05 - 44 -...
  • Page 45 [AKD4621-B] -100 -110 -120 -130 -140 -150 -160 -170 -180 Figure 55. FFT (Noise Floor) -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -120 -110 -100 dBFS Figure 56. THD+N vs. Input level (fin=1kHz) <KM100803>...
  • Page 46 [AKD4621-B] -62.5 -67.5 -72.5 -77.5 -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 Figure 57. THD+N vs. Input Frequency (Input level=-1dBFS) -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 dBFS Figure 58. Linearity (fin=1kHz) <KM100803>...
  • Page 47 [AKD4621-B] -0.2 -0.4 -0.6 -0.8 -1.2 -1.4 -1.6 -1.8 -2.2 -2.4 -2.6 -2.8 Figure 59. Frequency Response (Input level=-1dBFS) -82.5 -87.5 -92.5 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -122.5 -125 -127.5 -130 -132.5 -135 -137.5 -140 Figure 60.

  • Page 48: Revision History

    AKM or any third party with respect to the information in this document. You are fully responsible for use of such information contained in this document in your product design or applications.
  • Page 49 C132 C133 OVFR/DZFR +3.3V (open) (open) (open) SW 1 +3.3V +3.3V TOTX141 0.1u AK4114 Mode_setting +3.3V SW 3 TEST1 0.1u 0.1u AK4621 Mode_setting R183 BNC_TX DA02 XTL1 XTL1 R184 XTL0 XTL0 DIF0/RX5 SDFIL DIF0/RX5 SDFIL OCKS1 DEM0 OCKS1 DEM0 OCKS0...
  • Page 50 SINGLE (open) DIFF 4.7k VOP_ADC- VOP_ADC- C36 (open) 3.3n NJM5534D 470p 0.1u 4.7k R101 SINGLE 100u AINL AINL+ AOUTL+ 0.1u DIFF NJM5532 100p NJM5532 VOP_ADC+ 3.9n VOP_ADC+ 0.1u VOP_ADC- (short) 100p 1.2k (short) (open) LOUT 470p 100p (open) (short) 3.3n NJM5534D Bias (open)

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