Page 1 Intel Server System SC5650HCBRP ® Technical Product Specification Intel order number E81443-002 Revision 1.2 April, 2010 Enterprise Platforms and Services Division...
Page 2 Revision Modifications Number September 2009 Initial Release March 2010 - Updated Section 3.3 - Updated Section 2.1 and 3.2 to add Intel® Xeon® Processor 5600 series support April 2010 - Removed CCC related notice Revision 1.2 Intel order number E81443-002...
Page 3 Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Page 4: Table Of Contents
1. Introduction .......................... 1 Chapter Outline ......................1 Server System Use Disclaimer ................1 2. Overview ..........................3 ® Intel Server System SC5650HCBRP Feature Set ..........3 ® 2.1.1 Intel Server System SC5650HCBRP Layout ............5 2.1.2 Mechanical Locks ....................9 2.1.3...
Page 5 Intel® Server System SC5650HCBRP TPS Table of Contents 3.3.3 Processor Cores, QPI Links and DDR3 Channels Frequency Configuration ..32 3.3.4 Publishing System Memory ................... 35 3.3.5 Memory Interleaving ....................36 3.3.6 Memory Test ......................36 3.3.7 Memory Scrub Engine ................... 36 3.3.8...
Page 6 Table of Contents Intel® Server System SC5650HCBRP TPS 4.1.5 Control and Indicator Functions ................71 4.1.6 PMBus Monitoring Interface .................. 74 600-W Power Distribution Board (PDB) ..............76 4.2.1 Mechanical Overview ..................... 77 4.2.2 DC Output Specification ..................82 4.2.3 Protection Circuits ....................
Page 7 Intel® Server System SC5650HCBRP TPS Table of Contents ® Intel Intelligent Power Node Manager ..............110 6.4.1 Manageability Engine (ME) .................. 110 7. BIOS Setup Utility ......................112 Logo / Diagnostic Screen ..................112 BIOS Boot Popup Menu ..................112 BIOS Setup Utility ....................
Page 8 Post Code Diagnostic LEDs ................172 11. Design and Environmental Specifications ..............173 ® 11.1 Intel Server System SC5650HCBRP Design Specifications ......173 11.2 MTBF ........................173 11.3 Processor Power Support ..................175 12. Regulatory and Certification Information ............... 176 12.1...
Page 9 Figure 15. Second Side Keep-out Zone ..................19 Figure 16. Rear I/O Layout ......................20 Figure 17. Intel ® Server System SC5650HCBRP Functional Block Diagram ......22 Figure 18. Unified Retention System and Unified Back Plate Assembly ........29 Figure 19. Intel ®...
Page 10 List of Figures Intel® Server System SC5650HCBRP TPS Figure 32. 6-HDD Expander SAS HSBP Board Layout ............100 Figure 33. SMBUS Block Diagram .................... 111 Figure 34. Setup Utility — Main Screen Display ............... 116 Figure 35. Setup Utility — Advanced Screen Display ............... 118 Figure 36.
Page 11 Intel® Server System SC5650HCBRP TPS List of Figures Revision 1.2 Intel order number E81443-002...
Page 12 Table 6. Supported DIMM Population under the Single Processor Configuration ...... 40 Table 7. Onboard SATA Storage Mode Matrix ................43 Table 8. Intel ® Server System SC5650HCBRP PCI Bus Segment Characteristics ....45 ® Table 9. Intel SAS Entry RAID Module AXX4SASMOD Storage Mode ........48 Table 10.
Page 13 Table 64. 6-HDD Expander SAS Hot-swap Backplane Connector Specifications ....100 Table 65. Basic and Advanced Management Features ............103 Table 66. Intel® Server System SC5650HCBRP Fan Domain Table ........109 Table 67. BIOS Setup Page Layout ..................113 Revision 1.2...
Page 14 List of Tables Intel® Server System SC5650HCBRP TPS Table 68. BIOS Setup: Keyboard Command Bar..............114 Table 69. Setup Utility — Main Screen Fields ................116 Table 70. Setup Utility — Advanced Screen Display Fields ............. 118 Table 71. Setup Utility — Processor Configuration Screen Fields ..........120 Table 72.
Page 15 Intel® Server System SC5650HCBRP TPS List of Tables Table 103. Front Panel SSI Standard 24-pin Connector Pin-out (J1B3) ........155 Table 104. VGA Connector Pin-out (J7A1) ................156 Table 105. RJ-45 10/100/1000 NIC Connector Pin-out (J5A1, J6A1) ........156 Table 106. SATA / SAS Connector Pin-out (J1E3, J1G1, J1G4, J1G5, J1F1, J1F4) ....157 Table 107.
Page 16 List of Tables Intel® Server System SC5650HCBRP TPS <This page intentionally left blank.> Revision 1.2 Intel order number E81443-002...
Page 17: Introduction
It is the responsibility of the system integrator who chooses not to use Intel developed server building blocks to consult vendor datasheets and operating parameters to determine the amount of airflow required for their specific application and environmental conditions.
Page 18 Introduction Intel® Server System SC5650HCBRP TPS cannot be held responsible if components fail or the server board does not operate correctly when used outside any of the published operating or non-operating limits. Revision 1.2 Intel order number E81443-002...
Page 19: Overview
® Feature Description Processors • Support for one or two Intel® Xeon® Processor(s) 5500 series up to 95W Thermal Design Power • Support for one or two Intel® Xeon® Processor(s) 5600 series up to 130W Thermal Design Power • 4.8 GT/s, 5.86 GT/s, and 6.4 GT/s Intel® QuickPath Interconnect (Intel® QPI) •...
Page 20 Light-Guided Diagnostics on field replaceable units ® • Support for Intel System Management Software 3.1 and beyond • Support for Intel® Intelligent Power Node Manager (Need PMBus-compliant power supply) BIOS Flash • Winbond* W25X64 Server Board Form • SSI EEB (12”x13”) Factor •...
Page 21: Intel Server System Sc5650Hcbrp Layout
Intel® Server System SC5650HCBRP TPS Overview 2.1.1 Intel Server System SC5650HCBRP Layout ® 2.1.1.1 Front View Components 5.25-inch Device Drive Bays Front Control Panel 3.5-inch Drive Bay Access Door Drive Bay Access Door Door Lock Front Panel USB Ports Figure 1. Front View Components (with Front Bezel Assembly) Revision 1.2...
Page 22: Figure 2. Front View Components (With Drive Access Door Open)
Overview Intel® Server System SC5650HCBRP TPS Hot-swap Disk Drive Bay Figure 2. Front View Components (with Drive Access Door Open) 2.1.1.2 Internal Components Revision 1.2 Intel order number E81443-002...
Page 23: Figure 3. Internal Components
Intel® Server System SC5650HCBRP TPS Overview Tool-less Device Bay Locks 5.25-inch Device Bays 3.5-inch Device Bay Drive Cage Retention Mechanism PCI Add-in Card Guide / System Fan Assembly Server Board Front Panel USB Ports Rear Tool-less PCI Retention Mechanisms Fan Duct / System Fan Assembly Power Supply Figure 3.
Page 24: Figure 5. Front Panel Components
Overview Intel® Server System SC5650HCBRP TPS 2.1.1.4 Front Control Panel Callout Button / LED Name Color Condition Description Power on Power LED Green Power off Power Button Powers the system on or off Used to force system halt and dump...
Page 25: Mechanical Locks
® The Intel Server System SC5650HCBRP chassis support the installation of a padlock loop (see letter “A” in the following figure) at the rear of the chassis. Additionally, the system ships with a two-position mechanical lock (see letter “B”) on the front bezel assembly to prevent access to the hard drives and the interior of the system.
Page 26 Overview Intel® Server System SC5650HCBRP TPS Callout Description Callout Description Slot 1, 32-bit/33 MHz PCI, Keying for 5V and System Fan 2 Header (6-pin) Universal ® Intel RMM3 Slot System Fan 1 Header (6-pin) Slot 2, PCI Express* x4 (x8 Mechanically)
Page 27: Server Board Mechanical Drawings
Intel® Server System SC5650HCBRP TPS Overview Callout Description Callout Description Back Panel I/O Ports SATA Port 2 Diagnostic and Identify LED’s HSBP_A System Fan 5 Header (4-pin) SATA Port 3 Power Connector for Processor 1 and Memory SATA Software RAID 5 Key Header...
Page 28: Figure 8. Mounting Hole Locations
Overview Intel® Server System SC5650HCBRP TPS Figure 8. Mounting Hole Locations Revision 1.2 Intel order number E81443-002...
Page 29: Figure 9. Major Connector Pin-1 Locations (1 Of 2)
Intel® Server System SC5650HCBRP TPS Overview Figure 9. Major Connector Pin-1 Locations (1 of 2) Revision 1.2 Intel order number E81443-002...
Page 30: Figure 10. Major Connector Pin-1 Locations (2 Of 2)
Overview Intel® Server System SC5650HCBRP TPS Figure 10. Major Connector Pin-1 Locations (2 of 2) Revision 1.2 Intel order number E81443-002...
Page 31: Figure 11. Primary Side Keep-Out Zone (1 Of 2)
Intel® Server System SC5650HCBRP TPS Overview Figure 11. Primary Side Keep-out Zone (1 of 2) Revision 1.2 Intel order number E81443-002...
Page 32: Figure 12. Primary Side Keep-Out Zone (2 Of 2)
Overview Intel® Server System SC5650HCBRP TPS Figure 12. Primary Side Keep-out Zone (2 of 2) Revision 1.2 Intel order number E81443-002...
Page 33: Figure 13. Primary Side Air Duct Keep-Out Zone
Intel® Server System SC5650HCBRP TPS Overview Figure 13. Primary Side Air Duct Keep-out Zone Revision 1.2 Intel order number E81443-002...
Page 34: Figure 14. Primary Side Card-Side Keep-Out Zone
Overview Intel® Server System SC5650HCBRP TPS Figure 14. Primary Side Card-Side Keep-out Zone Revision 1.2 Intel order number E81443-002...
Page 35: Figure 15. Second Side Keep-Out Zone
Intel® Server System SC5650HCBRP TPS Overview Figure 15. Second Side Keep-out Zone Revision 1.2 Intel order number E81443-002...
Page 36: Rear I/O Layout
Overview Intel® Server System SC5650HCBRP TPS 2.1.7 Rear I/O Layout ® The following drawing shows the layout of the rear I/O components for the Intel Server System SC5650HCBRP. Callout Description Callout Description System Status LED Video NIC Port 1 (1 Gb, Default Management...
Page 37: Functional Architecture
® The architecture and design of the Intel Server System SC5650HCBRP is based on the Intel ® ® 5520 and ICH10R chipset. The chipset is designed for systems based on the Intel Xeon ® ® Processor 5500 Series and Intel...
Page 38: Figure 17. Intel Server System Sc5650Hcbrp Functional Block Diagram
Functional Architecture Intel® Server System SC5650HCBRP TPS ® Figure 17. Intel Server System SC5650HCBRP Functional Block Diagram Revision 1.2 Intel order number E81443-002...
Page 39: Intel ® 5520 I/O Hub (Ioh)
– SMBus Interface ® ® – Intel Virtualization Technology for Directed I/O (Intel VT-d) ® The following table shows the high-level features of the Intel 5520 IOH: Table 1. IOH High-Level Summary IOH SKU Intel® QPI Ports Supported Processor PCI Express*...
Page 40: Enterprise South Bridge Interface (Esi)
ICH10R in the server board of Intel Server System SC5650HCBRP. 3.1.4 Manageability Engine (ME) ® An embedded ARC controller is within the IOH providing the Intel Server Platform Services (SPS). The controller is also commonly referred to as the Manageability Engine (ME). 3.1.5 Controller Link (CL) The Controller Link is a private, low-pin count (LPC), low power, communication interface between the IOH and the ICH10 portions of the Manageability Engine subsystem.
Page 41: Processor Support
QPI link interface and Thermal Design Power (TDP) up to 130 ® ® The server boards do not support previous generations of the Intel Xeon Processors. For a complete updated list of supported processors, see: http://support.intel.com/support/motherboards/server/S5520HC/. On the Support tab, look for “Compatibility”...
Page 42: Table 2. Mixed Processor Configurations
If the link speeds for all QPI links cannot be adjusted to be the same, then the BIOS: Logs the error into the SEL. – Displays “0195: Processor 0x Intel® QPI speed mismatch” message – in the Error Manager. Halts the system and will not boot until the fault condition is remedied.
Page 43: Intel ® Hyper-Threading Technology (Intel ® Ht)
The SMBIOS Type 4 structure shows only the installed physical processors. It does not describe the virtual processors. ® Because some operating systems are not able to efficiently use the Intel HT Technology, the BIOS does not create entries in the Multi-Processor Specification, Version 1.4 tables to describe the virtual processors.
Page 44: Core Multi-Processing
Phillips* screwdriver to attach to the Unified Backplate Assembly. See the following figure for the stacking order of URS components. ® The Unified Backplate Assembly is removable, allowing for the use of non-Intel heatsink retention solutions.
Page 45: Figure 18. Unified Retention System And Unified Back Plate Assembly
Intel® Server System SC5650HCBRP TPS Functional Architecture Figure 18. Unified Retention System and Unified Back Plate Assembly Revision 1.2 Intel order number E81443-002...
Page 46: Memory Subsystem
Xeon Processor 5600 Series on the Intel Server System SC5650HCBRP are populated on CPU sockets. Each processor installed on the CPU socket has an integrated memory controller (IMC), which supports up to three DDR3 channels and groups DIMMs on the server boards into autonomous memory.
Page 47: Supported Memory
Channel E, Slot 1 F1 (Blue) Channel F, Slot 0 F2 (Black) Channel F, Slot 1 ® Figure 19. Intel Server System SC5650HCBRP DIMM Slots Arrangement 3.3.2 Supported Memory ® The Intel Server System SC5650HCBRP supports: 1.5-V DDR3 DIMMs. Up to 12 DIMMs.
Page 48: Revision 1.2
Mixing memory type, size, speed and/or rank on this platform has not been validated and is not supported Mixing memory vendors is not supported on this platform by Intel Non-ECC memory is not supported and has not been validated in a server...
Page 49: Table 3. Memory Running Frequency Vs. Processor Sku
Intel® Server System SC5650HCBRP TPS Functional Architecture Table 3. Memory Running Frequency vs. Processor SKU DIMM Type DDR3 800 DDR3 1066 DDR3 1333 Processor Integrated Memory Running Frequency (Hz) = Memory Controller Fastest Common Frequency of Processor IMC and 1066...
Page 50 Functional Architecture Intel® Server System SC5650HCBRP TPS 1N: One clock cycle for the DRAM commands arrive at the DIMMs to execute. 2N: Two clock cycles for the DRAM commands arrive at the DIMMs to execute. Revision 1.2 Intel order number E81443-002...
Page 51: Publishing System Memory
When 4 GB or more of physical memory is installed (physical memory is the memory installed ® as DDR3 DIMMs), the reserved memory is lost. However, the Intel 5500/5520 I/O Hub provides a feature called high-memory reclaim, which allows the BIOS and the operating system to remap the lost physical memory into system memory above 4 GB (the system memory is the memory the processor can see).
Page 52: Memory Interleaving
Memory RAS 3.3.8.1 RAS Features ® The Intel Server System SC5650HCBRP supports the following memory channel modes: • Independent Channel Mode • Mirrored Channel Mode – providing Channel RAS feature These channel modes are used in conjunction with the standard Memory Test (Built-in Self-Test (BIST) and Memory Scrub engines to provide full RAS support.
Page 53: Memory Population And Upgrade Rules
® ® ® ® Adjacent slots on a DDR3 Channel from the Intel Xeon Processor 5500 series or Intel Xeon Processor 5600 Series do not need matching size and organization in independent channel mode. However, the speed of the channel is configured to the maximum common speed of the DIMMs.
Page 54 Functional Architecture Intel® Server System SC5650HCBRP TPS Current RAS mode of operation Existing DDR3 DIMM population DDR3 DIMM characteristics ® ® Optimization techniques used by the Intel Xeon Processor 5500 Series to maximize memory bandwidth In the Independent Channel mode, all the DDR3 channels operate independently. Also, you can use the Independent Channel mode to support single DIMM configuration in Channel A and in the Single Channel mode.
Page 55: Supported Memory Configuration
3.3.10.1.1 Levels of support The following categories of memory configurations are supported: Supported – These configurations were verified by Intel to work but only limited validation was performed. Not all possible DDR3 DIMM configurations were validated due to the large number of possible configuration combinations. Supported configurations are highlighted in light gray in Tables 5 and 6.
Page 56: Table 5. Supported Dimm Population Under The Dual Processors Configuration
Functional Architecture Intel® Server System SC5650HCBRP TPS M – Indicates whether the configuration supports the Mirrored Channel mode of operation. It is one of the following: Y indicating Yes; N indicating No. N – Identifies the total number of DIMMs that constitute the given configuration.
Page 57: Memory Error Handling
Intel® Server System SC5650HCBRP TPS Functional Architecture 3.3.11 Memory Error Handling The BIOS classifies memory errors into the following categories: Correctable ECC errors: This correction could be the result of an ECC correction, a successfully retried memory cycle, or both.
Page 58: Ich10R
Embedded Server RAID Technology II (Intel ESRTII) feature provides RAID modes ® ® 0, 1, and 10. If RAID 5 is needed with Intel ESRTII, you must install the optional Intel RAID Activation Key AXXRAKSW5 accessory. You must place this activation key on the SATA ®...
Page 59: Table 7. Onboard Sata Storage Mode Matrix
® implementation and provides the ability to use an Intel Embedded Server RAID Technology II ® volume as a boot disk and detect any faults in the Intel Embedded Server RAID Technology II volume(s). 3.4.1.2 Onboard SATA Storage Mode Matrix Table 7.
Page 60: Usb 2.0 Support
One internal 2x5 header (J1D1) is provided, capable of supporting two optional USB 2.0 ports. ® • One internal 2x5 header (J1D2) is provided for Intel Server or Workstation chassis front panel USB ports, capable of supporting two optional USB 2.0 ports. •...
Page 61: Pci Subsystem
Functional Architecture PCI Subsystem ® The primary I/O buses for the server board of Intel Server System SC5650HCBRP are PCI, PCI Express* Gen1, and PCI Express* Gen2 with six independent PCI bus segments. PCI Express* Gen1 and Gen2 are dual-simplex point-to-point serial differential low-voltage interconnects.
Page 62: Intel Sas Entry Raid Module Axx4Sasmod (Optional Accessory)
Intel SAS Entry RAID Module AXX4SASMOD (Optional Accessory) ® ® The Intel Server System SC5650HCBRP provides a Serial Attached SCSI (SAS) module slot ® (J2J1) for the installation of an optional Intel SAS Entry RAID Module AXX4SASMOD. Once ® the optional Intel...
Page 63: Sas Raid Support
SAS Entry RAID Module” option is enabled by default once the Intel SAS Entry ® RAID Module AXX4SASMOD is present. When enabled, you can set the “Configure Intel ® Entry RAID Module” to either “IT/IR RAID” or “Intel ESRTII” mode.
Page 64: Table 9. Intel Sas Entry Raid Module Axx4Sasmod Storage Mode
Linux* backplanes AXXRAKSW5 Versions only *Select in BIOS Setup: “Configure Intel® SAS Entry RAID” Option on Advanced | Mass Storage Controller Configuration Screen 3.6.1.1 IT/IR RAID Mode Supports entry hardware RAID 0, RAID 1, and RAID 1E and native SAS pass-through mode.
Page 65: Baseboard Management Controller
Baseboard Management Controller ® The Intel Server System SC5650HCBRP has an integrated BMC controller based on ServerEngines* Pilot II. The BMC controller is provided by an embedded ARM9 controller and associated peripheral functionality that is required for IPMI-based server management.
Page 66: Bmc Embedded Lan Channel
NIC1. ® ® Interface 2: This interface is available from Intel Remote Management Module 3 (Intel RMM3), which is a dedicated management NIC and not shared with the host. For these channels, you can enable support for IPMI-over-LAN and DHCP.
Page 67: Serial Ports
Serial Ports ® The Intel Server System SC5650HCBRP provides two serial ports: an external DB9 serial port and an internal DH-10 serial header. The rear DB9 serial A port is a fully-functional serial port that can support any standard serial device.
Page 68: Video Modes
Functional Architecture Intel® Server System SC5650HCBRP TPS 3.11.1 Video Modes The integrated video controller supports all standard IBM* VGA modes. The following table shows the 2D modes supported for both CRT and LCD. Table 11. Video Modes 2D Video Mode Support...
Page 69: Network Interface Controller (Nic)
During the manufacturing process, each server system has a white MAC address sticker placed ® on the top of the NIC 1 port. The sticker displays the NIC 1 MAC address and Intel RMM3 MAC in both bar code and alphanumeric formats.
Page 70: 3.13 Acpi Support
® The Intel Server System SC5650HCBRP can wake up from S1 state using the USB devices in addition to the sources described in the following paragraph. The wake-up sources are enabled by the ACPI operating systems with cooperation from the drivers;...
Page 71: Power Sub-System
Intel® Server System SC5650HCBRP TPS Power Sub-system Power Sub-system 600-W 1+1 Power Supply Module The 600-W power supply module specification defines a 1+1 power supply module that supports pedestal server systems. It defines a 600-W power supply with 2 outputs: +12Vdc and +5Vsb.
Page 72 Power Sub-system Intel® Server System SC5650HCBRP TPS 4.1.1.1 Handle and Retention Mechanism The power supply has a handle to provide a place to grip the power supply for removal and insertion. The power supply has a simple retention mechanism to retain the power supply once it is inserted.
Page 73: Ac Input Requirements
Intel® Server System SC5650HCBRP TPS Power Sub-system Table 13. Acoustic Requirements Operating Conditions Inlet Temperature % of Single module LwAd (BA) Condition Maximum Loading Condition Maximum (1+0 & 1+1) 45ºC 100% < 6.5 Operating (1+0 & 1+1) 40°C < 5.2 Idle (1+0 &...
Page 74: Table 15. Efficiency
Power Sub-system Intel® Server System SC5650HCBRP TPS 4.1.2.2 Efficiency The following table provides the required minimum efficiency level at four loading conditions: 100%, 50%, 20% and 10%. Efficiency is tested at the AC input voltage 230VAC. Table 15. Efficiency Loading...
Page 75: Table 17. Ac Line Sag Transient Performance
The power supply meets the following electrical immunity requirements when connected to a cage with an external EMI filter that meets the criteria defined in the SSI document EPS Power Supply Specification. For further information on Intel standards, please request a copy of the Intel Environmental Standards Handbook.
Page 76: Table 19. Performance Criteria
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 19. Performance Criteria Level Description The apparatus should continue to operate as intended. No degradation of performance. The apparatus should continue to operate as intended. No degradation of performance beyond spec limits.
Page 77: Table 20. Holdup Requirements
The power supply complies with the limits defined in EN55024: 1998 using the IEC 61000-4- 11:1995 test standard and performance criteria C defined in Annex B of CISPR 24. In addition, the power supply meets the following Intel Requirement: Revision 1.2...
Page 78: Dc Output Specification
Power Sub-system Intel® Server System SC5650HCBRP TPS o A continuous input voltage below the nominal input range should not damage the power supply or cause overstress to any power supply component. The power supply must be able to return to normal power up state after a brownout condition.
Page 79: Table 21. Edge Finger Power Supply Connector Pin-Out
Intel® Server System SC5650HCBRP TPS Power Sub-system Table 21. Edge Finger Power Supply Connector Pin-out Connector Upper Side Pin No Pin No. Bottom Side Top. Bottom +12 V +12 V Gold finger edge +12 V +12 V connector: 2X25 +12 V...
Page 80: Table 22. Power Supply Module Load Ratings
Power Sub-system Intel® Server System SC5650HCBRP TPS Signals that are defined as low true or high true use the following convention: signal# = low true Reserved pins are reserved for future use. 4.1.3.2 Grounding The ground of the pins of the power supply output connector provides the power return path.
Page 81: Table 23. Voltage Regulation Limits
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.1.3.6 Voltage Regulation The power supply output voltages stay within the following voltage limits when operating at steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise specified in the Voltage Regulation Limits table. All outputs are measured with reference to the GND.
Page 82: Table 26. Ripple And Noise
Power Sub-system Intel® Server System SC5650HCBRP TPS 4.1.3.9 Closed Loop Stability The power supply is unconditionally stable under all line/load/transient load conditions, including capacitive load ranges. A minimum 45-degree phase margin and -10dB-gain margin is met. Closed-loop stability is ensured at the maximum and minimum loads, as applicable.
Page 83: Figure 24. Output Voltage Timing
Intel® Server System SC5650HCBRP TPS Power Sub-system Item Description Minimum Maximum Units Tvout_on All main outputs must be within regulation of each msec other within this time. T vout_off All main outputs must leave regulation within this msec time. * The 5VSB output voltage rise time should be from 1.0 ms to 25.0 ms.
Page 84: Table 28. Turn On / Off Timing
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 28. Turn On / Off Timing Item Description Minimum Maximum Units Tsb_on_delay Delay from AC being applied to 5 VSB being within regulation. 1500 Tac_on_delay Delay from AC being applied to all output voltages being 2500 within regulation.
Page 85: Figure 25. Turn On/Off Timing (Power Supply Signals)
Intel® Server System SC5650HCBRP TPS Power Sub-system Figure 25. Turn On/Off Timing (Power Supply Signals) A C Input vout_h oldup V ou t pw ok_low A C _on _delay pw ok_off sb_ on _delay pw ok_on sb_ on _delay pw ok_on...
Page 86: Protection Circuits
Power Sub-system Intel® Server System SC5650HCBRP TPS While in standby mode, at no load condition, the residual voltage on the 12-V output does not exceed 100 mV. 4.1.3.16 Soft Starting The power supply contains control circuits that provide monotonic soft start of its outputs without overstressing the AC line or any power supply components at any specified AC line or load conditions.
Page 87: Control And Indicator Functions
Intel® Server System SC5650HCBRP TPS Power Sub-system connector during any single point of fail. The voltage will never trip any lower than the minimum levels when measured at the power pins of the power supply connector. Table 30. Over-voltage Protection Limits...
Page 88: Table 31. Pson# Signal Characteristic
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 31. PSON# Signal Characteristic Signal Type Accepts an open collector/drain input from the system. Pull-up to VSB located in power supply. PSON# = Low PSON# = High or Open Logic level low (power supply ON) 1.0V...
Page 89: Table 33. Pwok Signal Characteristics
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.1.5.3 PWOK (Power OK) Output Signal PWOK is a power OK signal and is pulled HIGH by the power supply to indicate that all the outputs are within the regulation limits of the power supply. When any output voltage falls below regulation limits or when AC power has been removed for a time sufficiently long so the power supply operation is no longer guaranteed, PWOK will be de-asserted to a LOW state.
Page 90: Pmbus Monitoring Interface
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 34. LED Indicators Power Supply Condition Status LED Power Led Remarks (AC OK / Power Supply (Power Good) Fail) AC Power Off AC Power On in Standby Mode Green AC On and All Outputs in Normal Mode...
Page 91 Intel® Server System SC5650HCBRP TPS Power Sub-system System addressing 0/0/0 0/0/1 0/1/0 0/1/1 1/0/0 1/0/1 1/1/0 1/1/1 Address2/Address1/ Address0 PMBus device read B0h/B1h1 B2h/B3h B4h/B5h B6h/B7h B8h/B9h BAh/BBh BCh/BDh BEh/BFh addresses 2 Non-redundant power supplies use the 0/0/0 address location The addressing method uses the 7 MSB bits to set the address and the LSB to define whether a device is reading or writing.
Page 92: 600-W Power Distribution Board (Pdb)
Power Sub-system Intel® Server System SC5650HCBRP TPS 600-W Power Distribution Board (PDB) This specification defines the power distribution board (PDB) for the ERP12V 600-W 1+1 redundant power supply and for the ERP 12V 600-W 2+0 non-redundant power supply. The PDB is designed to plug directly to the output connector of the power supply and contains three DC/DC power converters to produce other required voltages: +3.3VDC, +5VDC, and –12VDC...
Page 93: Mechanical Overview
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.2.1 Mechanical Overview Revision 1.2 Intel order number E81443-002...
Page 94: Figure 26. Mechanical Drawing For Dual (1+1 Configuration) Power Supply Enclosure
Power Sub-system Intel® Server System SC5650HCBRP TPS Figure 26. Mechanical Drawing for Dual (1+1 Configuration) Power Supply Enclosure 4.2.1.1 Airflow Requirements There is no fan in the cage; the cage is cooled by the fan in the power supply module(s) when combined together in the system.
Page 95: Table 35. Environmental Requirements
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.2.1.2 Temperature Requirements The PDB operates within all specified limits over the T temperature range. Table 35. Environmental Requirements Item Description Units Operating temperature range. °C Tnon-op Non-operating temperature range. °C Altitude Maximum operating altitude 1500 4.2.1.3...
Page 96 Power Sub-system Intel® Server System SC5650HCBRP TPS Signal 18 AWG Color Signal 18 AWG Color Black PSON# Green (24AWG) COM RS Black (24AWG) Black +5VDC Black 5V RS Red (24AWG) Black Black Reserved N.C. +5VDC +5VDC Black +5VDC PWR OK...
Page 97: Table 38. P2 Processor 0 Power Connector
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.2.1.6 Processor 0 Power Connector (P2) Connector housing: 8-Pin Molex* 39-01-2080 or equivalent Contact: Molex* 44476-1111 or equivalent Table 38. P2 Processor 0 Power Connector Signal 18 AWG Color Signal 18 AWG Color...
Page 98: Dc Output Specification
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 40. P5, P6, P7, and P8 Peripheral Power Connectors Signal 18 AWG Color +12V4 Green Black Black +5 VDC 4.2.1.9 Right-angle SATA Power Connectors (P9) Connector housing: JWT* F6002HS0-5P-18 or equivalent Table 41. P9 Right-angle SATA Power Connector...
Page 99: Table 43. +12V Outputs Load Ratings
Intel® Server System SC5650HCBRP TPS Power Sub-system output voltage internal to the DC/DC converter. Remote sense must be able to regulate out of up to 300mV drop on the +3.3V and 5V outputs. Also, the power supply ground return remote sense (ReturnS) passes through the PDB and the output harness to regulate out ground drops for its +12V and 5Vsb output voltages.
Page 100: Table 45. Voltage Regulation Limits
Power Sub-system Intel® Server System SC5650HCBRP TPS All outputs are measured with reference to the return remote sense signal (ReturnS). The 3.3V and 5V outputs are measured at the remote sense point; all other voltages are measured at the output harness connectors.
Page 101: Table 48. Ripple And Noise
Intel® Server System SC5650HCBRP TPS Power Sub-system 4.2.2.7 DC/DC Converters Closed Loop Stability Each DC/DC converter is unconditionally stable under all line/load/transient load conditions, including capacitive load ranges. A minimum of 45 degrees phase margin and –10dB-gain margin is required.
Page 102: Figure 27. Output Voltage Timing
Power Sub-system Intel® Server System SC5650HCBRP TPS Table 49. Output Voltage Timing Item Description Minimum Maximum Units Output voltage rise time from each main output. 5.0* msec vout_rise All main outputs must be within regulation of each msec vout_on other within this time.
Page 103: Figure 28. Turn On/Off Timing (Power Supply Signals)
Intel® Server System SC5650HCBRP TPS Power Sub-system Item Description Loading Minimum Maximum Units Delay from PWOK de-asserted to output voltags (3.3V, pwok_off 5V, 12V, -12V) dropping out of regulation limits. Duration of PWOK being in the de-asserted state pwok_low during an off/on cycle using AC or the PSON signal.
Page 104: Protection Circuits
Power Sub-system Intel® Server System SC5650HCBRP TPS 4.2.2.13 Soft Start Requirements The power supply contains a control circuit which provides monotonic soft start for its outputs without overstressing the AC line or any power supply components at any specified AC line or load conditions.
Page 105: Control And Indicator Functions (Hard-Wired)
Intel® Server System SC5650HCBRP TPS Power Sub-system Table 52. Over-voltage Protection (OVP) Limits Output Voltage OVP MIN (V) OVP MAX (V) +3.3V -12V -13.3 -14.5 +12V1/2/3/4 See Power Supply specification. +5vsb See Power Supply specification. 4.2.3.3 Over Temperature Protection (OTP) There is not a requirement of thermal sensor located on the cage and have OTP function itself.
Page 106: Table 54. Pwok Signal Characteristics
Power Sub-system Intel® Server System SC5650HCBRP TPS 4.2.4.2 PSKILL The purpose of the PSKill pin is to allow for hot swapping of the power supply. The mating pin of this signal on the cage input connector is tied to ground, and its resistance is less than 5 ohms.
Page 107: Pmbus
Intel® Server System SC5650HCBRP TPS Power Sub-system Open collector / drain output from power supply. Signal Type (Active Low) Pull-up to VSB located in system. Sink current, Alert# = high 50 μA Alert# rise and fall time 100 μs 4.2.5...
Page 108: Hdd Expander Sas Hot Swap Backplane
6-HDD Expander SAS Hot Swap Backplane Overview ® The Intel Server System SC5650HCBRP integrates one 6-HDD Expander SAS Hot-swap Backplane (HSBP). The architecture is based on the Vitesse VSC7161* SAS Expander with enclosure management controller and has support for up to six SAS or SATA drives.
Page 109: Sas Expander Vitesse Vsc7161
Intel® Server System SC5650HCBRP TPS 6-HDD Expander SAS Hot Swap Backplane Figure 29. 6HDD Active SAS/SATA HSBP Block Diagram 5.1.1 SAS Expander Vitesse VSC7161* The Vitesse VSC7161* device is a 10-port, self-configuring SAS Expander that supports 1.5 Gbps and 3.0 Gbps. This device is used for server and enclosure applications for mid-range and enterprise storage systems requiring active SAS port expansion.
Page 110: Figure 30. Expander Management (Em) Subsystem
6-HDD Expander SAS Hot Swap Backplane Intel® Server System SC5650HCBRP TPS interface or vendor-specific SMP implementation. As the SMP management application client, the CPU (in Master mode) handles all SMP initiator requests and all SMP response functions. 5.1.1.1 Expander Management (EM) subsystem of SAS Expander...
Page 111: Figure 31. Active Sas/Sata Hsbp I
Intel® Server System SC5650HCBRP TPS 6-HDD Expander SAS Hot Swap Backplane Table 56. 7-pin SAS Connector Pin-out Connector Contact Number Signal Name SASn_EP_RX_P SASn_EP_RX_N SASn_EP_TX_N SASn_EP_TX_P 5.1.1.3 C Serial Bus Interface The Vitesse VSC7161* SAS Expander supports two independent I C interface ports with bus speed of up to 400 Kbits.
Page 112: General Purpose Input/Output (Gpio)
6-HDD Expander SAS Hot Swap Backplane Intel® Server System SC5650HCBRP TPS Table 58. 6HDD I C Bus Loading Device Power Ileak I2C Bus Name Well Address P3V3 0.7 VCC 0.3 VCC 0.4 V/3 mA 1 uA 3 PF SAS_I2C0_DAT, TMP75...
Page 113: External Memory Device
Intel® Server System SC5650HCBRP TPS 6-HDD Expander SAS Hot Swap Backplane VSC7161* I/O Type Power Programming System Function Connection PIN Name Well Description P0_6 3.3 V Test Point P0_6 TP_EP_P0_6 P0_7 3.3 V Test Point P0_7 TP_EP_P0_7 P0_8 3.3 V...
Page 114: Sas/Sata Drive Connectors
6-HDD Expander SAS Hot Swap Backplane Intel® Server System SC5650HCBRP TPS 5.1.5 SAS/SATA Drive Connectors The 6-HDD Expander SAS HSBP provides six 22-pin SAS/SATA connectors for hot-swap hard disk drives supporting a 1.5 GHz and 3.0 GHz transfer rate. The following table defines the pin-out of the 22-pin SAS/SATA Drive Connector: Table 61.
Page 115: Clock Generation And Distribution
Intel® Server System SC5650HCBRP TPS 6-HDD Expander SAS Hot Swap Backplane 5.1.7 Clock Generation and Distribution The 6-HDD Expander SAS HSBP HSBP provides one clock source. A 75-MHz oscillator provides the clock to the VSC7161* SAS Expander. 5.1.8 IPMB Header - IPMB The following table defines the pin-out of the 4-pin IPMB Header.
Page 116: Board Layouts
6-HDD Expander SAS Hot Swap Backplane Intel® Server System SC5650HCBRP TPS 5.1.10 Board Layouts The following figures show the board layout and connector placement of the 6-HDD Expander SAS hot-swap backplane. A: SATA/SAS hot-swap drive connectors B: SATA/SAS cable connectors...
Page 117: Platform Management
Intel® Server System SC5650HCBRP TPS Platform Management Platform Management The platform management subsystem is based on the Integrated BMC features of the ServerEngines* Pilot II. The onboard platform management subsystem consists of communication buses, sensors, and the system BIOS, and server management firmware.
Page 118 Platform Management Intel® Server System SC5650HCBRP TPS Chassis intrusion detection (dependant on platform support) Basic fan control using TControl version 2 SDRs Fan redundancy monitoring and support Power supply redundancy monitoring and support Hot swap fan support Acoustic management: Supports multiple fan profiles Signal testing support: The BMC provides test commands for setting and getting platform signal states.
Page 119: Optional Advanced Management Feature Support
***Intel® Intelligent Power Node Manager Support requires PMBus-compliant power supply 6.2.1 Enabling Advanced Management Features ® BMC will enable advanced management features only when it detects the presence of the Intel ® ® Remote Management Module 3 (Intel RMM3) card. Without the Intel RMM3, the advanced features are dormant.
Page 120: Keyboard, Video, And Mouse (Kvm) Redirection
Runtime Environment (JRE) update: http://java.com/en/download/index.jsp ® This feature is only enabled when the Intel RMM3 is present. Note: KVM Redirection is only available with onboard video controller, and the onboard video controller must be enabled and used as the primary video output Note: The BIOS will detect one set of USB keyboard and mouse for the KVM redirection ®...
Page 121: Web Services For Management (Ws-Man)
Intel® Server System SC5650HCBRP TPS Platform Management administrators or users to boot the server or install software (including operating systems), copy files, update the BIOS, and so forth, or boot the server from this device. The following capabilities are supported: The operation of remotely mounted devices is independent of the local devices on the server.
Page 122: Embedded Web Server
Power Control Sensor Reading SEL Reading ® KVM/Media Redirection: Only available when the Intel RMM3 is present. IPMI User Management The web server is available on all enabled LAN channels. If a LAN channel is enabled, properly configured, and accessible, the web server is available.
Page 123: Platform Control
Intel® Server System SC5650HCBRP TPS Platform Management Platform Control This server platform has embedded platform control which is capable of automatically adjusting system performance and acoustic levels. Platform control optimizes system performance and acoustics levels through: Performance management Performance throttling...
Page 124: Memory Open And Closed Loop Thermal Throttling
NVRAM on the server board. It allows the user to select which supported chassis (Intel or Non-Intel) and platform chassis configuration is used. Based on the input provided, the FRUSDR writes sensor data specific to the configuration to NVRAM for the BMC controller to read each time the system is powered on.
Page 125: Figure 21. Intel
CPU 1 Fan, CPU 2 Fan Fan Domain 1 System Fan 5 System Fan 1 Fan Domain 2 System Fan 2 (not used in SC5650HCBRP) System Fan 3 Fan Domain 3 System Fan 4 (not used in SC5650HCBRP) 6.3.2.3 Configuring the Fan Profile Using the BIOS Setup Utility The BIOS uses options set in the <F2>...
Page 126: Intel ® Intelligent Power Node Manager
With the platform running in Acoustics mode, several platform control algorithm variables are set to ensure acoustic targets are not exceeded for specified Intel platforms. In this mode, the platform is programmed to set the fans at lower speeds when the processor does not require additional cooling due to high utilization / power consumption.
Page 127: Figure 33. Smbus Block Diagram
Intel® Server System SC5650HCBRP TPS Platform Management Figure 33. SMBUS Block Diagram Revision 1.2 Intel order number E81443-002...
Page 128: Bios Setup Utility
The diagnostic screen displays the following information: BIOS ID Platform name Total memory detected (Total size of all installed DDR3 DIMMs) Processor information (Intel branded string, speed, and number of physical processors identified) Keyboards detected (if plugged in) Mouse devices detected (if plugged in)
Page 129: Operation
7.3.1.2 Entering BIOS Setup To enter the BIOS Setup, press the F2 function key during boot time when the OEM or Intel logo displays. The following message displays on the diagnostics screen and under the Quiet Boot logo screen: Press <F2>...
Page 130: Table 68. Bios Setup: Keyboard Command Bar
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Each Setup menu page contains a number of features. Each feature is associated with a value field except those used for informative purposes. Each value field contains configurable parameters. Depending on the security option selected and in effect by the password, a menu feature’s value may or may not change.
Page 131: Server Platform Setup Utility Screens
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Option Description <F10> Save and Exit Pressing <F10> causes the following message to display: Save configuration and reset? If “Yes” is highlighted and <Enter> is pressed, all changes are saved and the Setup is exited.
Page 132: Figure 34. Setup Utility - Main Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.1 Main Screen Unless an error occurred, the Main screen is the first screen displayed when the BIOS Setup is entered. If an error occurred, the Error Manager screen displays instead. Main...
Page 133 Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Setup Item Options Help Text Comments Build Date Information only. Displays the current BIOS build date. Memory Size Information only. Displays the total physical memory installed in the system, in MB or GB. The term...
Page 134: Figure 35. Setup Utility - Advanced Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.2 Advanced Screen The Advanced screen provides an access point to configure several options. On this screen, the user selects the option they must configure. Configurations are performed on the selected screen and not directly on the Advanced screen.
Page 135: Figure 36. Setup Utility - Processor Configuration Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.2.1 Processor Configuration Screen The Processor screen allows the user to view the processor core frequency, system bus frequency, and to enable or disable several processor options. This screen also allows the user to view information about a specific processor.
Page 136: Table 71. Setup Utility - Processor Configuration Screen Fields
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Table 71. Setup Utility — Processor Configuration Screen Fields Setup Item Options Help Text Comments Processor ID Information only. Processor CPUID Processor Frequency Information only. Current frequency of the processor. Microcode Revision Information only.
Page 137 Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Setup Item Options Help Text Comments Intel® Virtualization Enabled Intel® Virtualization Technology allows a Technology platform to run multiple operating systems Disabled and applications in independent partitions. Note: A change to this option requires the system to be powered off and then back on before the setting takes effect.
Page 138: Figure 37. Setup Utility - Memory Configuration Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.2.2 Memory Screen The Memory screen allows the user to view details about the system memory DDR3 DIMMs installed. This screen also allows the user to open the Configure Memory RAS and Performance screen.
Page 139: Table 72. Setup Utility - Memory Configuration Screen Fields
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Table 72. Setup Utility — Memory Configuration Screen Fields Setup Item Options Help Text Comments Total Memory Information only. The amount of memory available in the system in the form of installed DDR3 DIMMs in units of MB or GB.
Page 140: Figure 38. Setup Utility - Configure Ras And Performance Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.2.2.1 Configure Memory RAS and Performance Screen The Configure Memory RAS and Performance screen allows the user to customize several memory configuration options, such as whether to use Memory Mirroring. To access this screen from the Main screen, select Advanced > Memory > Configure Memory RAS and Performance.
Page 141: Figure 39. Setup Utility - Mass Storage Controller Configuration Screen Display
Mass Storage Controller Screen The Mass Storage screen allows the user to configure the SATA/SAS controller when it is present on the baseboard module card of an Intel system. To access this screen from the Main menu, select Advanced > Mass Storage.
Page 142 BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Setup Item Options Help Text Comments SATA Mode Enhanced [ENHANCED] - Supports up to 6 SATA ports with No longer displays when the IDE Native Mode. Onboard SATA Controller is Compatibility disabled.
Page 143: Figure 40. Setup Utility - Serial Port Configuration Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.2.4 Serial Ports Screen The Serial Ports screen allows the user to configure the Serial A [COM 1] and Serial B [COM2] ports. To access this screen from the Main screen, select Advanced > Serial Port.
Page 144: Figure 41. Setup Utility - Usb Controller Configuration Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.2.5 USB Configuration Screen The USB Configuration screen allows the user to configure the USB controller options. To access this screen from the Main screen, select Advanced > USB Configuration. Advanced USB Configuration Detected USB Devices <Total USB Devices in System>...
Page 145: Table 76. Setup Utility - Usb Controller Configuration Screen Fields
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Table 76. Setup Utility — USB Controller Configuration Screen Fields Setup Item Options Help Text Comments Detected USB Information only. Shows the number Devices of USB devices in the system. USB Controller...
Page 146: Figure 42. Setup Utility - Pci Configuration Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.2.6 PCI Screen The PCI Screen allows the user to configure the PCI add-in cards, onboard NIC controllers, and video options. To access this screen from the Main screen, select Advanced > PCI.
Page 147: Figure 43. Setup Utility - System Acoustic And Performance Configuration Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Setup Item Options Help Text Comments Onboard NIC2 ROM Enabled If enabled. loads the embedded option ROM for the onboard network controllers. Disabled Warning: If [Disabled] is selected, NIC2 cannot be used to boot or wake the system.
Page 148: Table 78. Setup Utility - System Acoustic And Performance Configuration Screen Fields
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Table 78. Setup Utility — System Acoustic and Performance Configuration Screen Fields Setup Item Options Help Text Comments Set Throttling Auto [Auto] – Auto Throttling mode. Mode CLTT [CLTT] – Closed Loop Thermal Throttling Mode.
Page 149: Figure 44. Setup Utility - Security Configuration Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Main Advanced Security Server Management Boot Options Boot Manager Administrator Password Status <Installed/Not Installed> User Password Status <Installed/Not Installed> Set Administrator Password [1234aBcD] Set User Password [1234aBcD] Front Panel Lockout Enabled / Disabled <Enabled &...
Page 150 [No Operation] on every boot cycle by default. *Not Available in Intel® Server System SC5650HCBRP, which has no TPM. ** Grayed-out at [No Operation] state in Intel® Server System SC5650HCBRP, which has no TPM. 7.3.2.4 Server Management Screen The Server Management screen allows the user to configure several server management features.
Page 151: Figure 45. Setup Utility - Server Management Configuration Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Main Advanced Security Server Management Boot Options Boot Manager Assert NMI on SERR Enabled / Disabled Assert NMI on PERR Enabled / Disabled Resume on AC Power Loss Stay Off / Last state / Reset...
Page 152: Table 80. Setup Utility - Server Management Configuration Screen Fields
If the OS does not complete Disabled booting before the timer expires, the BMC resets the system and an error is logged. Requires OS support or Intel Management Software. O/S Boot Watchdog Power Off If the OS boot watchdog timer is enabled, this is the...
Page 153: Figure 46. Setup Utility - Console Redirection Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.4.1 Console Redirection Screen The Console Redirection screen allows the user to enable or disable console redirection and configure the connection options for this feature. To access this screen from the Main screen, select Server Management > Console Redirection.
Page 154: Table 81. Setup Utility - Console Redirection Configuration Fields
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Table 81. Setup Utility — Console Redirection Configuration Fields Setup Item Options Help Text Console Redirection Disabled Console redirection allows a serial port to be used for server management tasks. Serial Port A [Disabled] - No console redirection.
Page 155: Figure 47. Setup Utility - Server Management System Information Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.5 Server Management System Information Screen The Server Management System Information screen allows the user to view part numbers, serial numbers, and firmware revisions. To access this screen from the Main screen, select Server Management > System Information.
Page 156: Figure 48. Setup Utility - Boot Options Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Setup Item Comments UUID Information only 7.3.2.6 Boot Options Screen The Boot Options screen displays any bootable media encountered during POST and allows the user to configure the desired boot device. To access this screen from the Main screen, select Boot Options.
Page 157: Table 83. Setup Utility - Boot Options Screen Fields
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Table 83. Setup Utility — Boot Options Screen Fields Setup Item Options Help Text Comments After entering the necessary Boot Timeout 0 - 65535 The number of seconds the BIOS should pause at...
Page 158: Figure 49. Setup Utility - Add New Boot Option Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS If all types of bootable devices are installed in the system, then the default boot order is: 1. CD/DVD-ROM 2. Floppy Disk Drive 3. Hard Disk Drive 4. PXE Network Device 5. BEV (Boot Entry Vector) Device 6.
Page 159: Figure 50. Setup Utility - Delete Boot Option Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.6.2 Delete Boot Option Screen The Delete Boot Option screen allows the user to remove an EFI boot option from the boot order. Note that while you can delete the Internal EFI Shell in this screen, it is restored to the Boot Order on the next reboot.
Page 160: Figure 51. Setup Utility - Hard Disk Order Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.6.3 Hard Disk Order Screen The Hard Disk Order screen allows the user to control the hard disks. To access this screen from the Main screen, select Boot Options > Hard Disk Order.
Page 161: Figure 53. Setup Utility - Floppy Order Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Table 87. Setup Utility — CDROM Order Fields Setup Item Options Help Text CDROM #1 Available legacy Set system boot order by selecting the boot devices for this option for this position.
Page 162: Figure 54. Setup Utility - Network Device Order Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.6.6 Network Device Order Screen The Network Device Order screen allows the user to control the network bootable devices. To access this screen from the Main screen, select Boot Options > Network Device Order.
Page 163: Figure 56. Setup Utility - Boot Manager Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility Table 90. Setup Utility — BEV Device Order Fields Setup Item Options Help Text BEV Device #1 Available legacy Set system boot order by selecting the boot devices for this option for this position.
Page 164: Figure 57. Setup Utility - Error Manager Screen Display
BIOS Setup Utility Intel® Server System SC5650HCBRP TPS 7.3.2.8 Error Manager Screen The Error Manager screen displays any errors encountered during POST. Error Manager Exit ERROR CODE SEVERITY INSTANCE Figure 57. Setup Utility — Error Manager Screen Display Table 92. Setup Utility — Error Manager Screen Fields...
Page 165: Figure 58. Setup Utility - Exit Screen Display
Intel® Server System SC5650HCBRP TPS BIOS Setup Utility 7.3.2.9 Exit Screen The Exit screen allows the user to choose whether to save or discard the configuration changes made on the other screens. It also allows the user to restore the server to the factory defaults or to save or restore them to the set of user-defined default values.
Page 166 BIOS Setup Utility Intel® Server System SC5650HCBRP TPS Setup Item Help Text Comments Save as User Default Save current BIOS Setup utility values as custom User prompted for confirmation. Values user default values. If needed, the user default values can be restored via the Load User Default Values option below.
Page 167: Connector/Header Locations And Pin-Outs
Intel® Server System SC5650HCBRP TPS Connector/Header Locations and Pin-outs Connector/Header Locations and Pin-outs Server Board Connector Information The following section provides detailed information regarding all connectors, headers, and jumpers on the server boards. The following table lists all connector types available on the board and the corresponding preference designators printed on the silkscreen.
Page 168: Power Connectors
Connector/Header Locations and Pin-outs Intel® Server System SC5650HCBRP TPS Connector Quantity Reference Designators Connector Type Pin Count Chassis Intrusion J1F6 Header Serial ATA J1G1, J1G4, J1G5, J1E3, J1F1, J1F4 Header HSBP J1F5, J1G3 Header SATA SGPIO J1G2 Header LCP/IPMB J1G6...
Page 169: System Management Headers
Intel® Server System SC5650HCBRP TPS Connector/Header Locations and Pin-outs Table 96. CPU 1 Power Connector Pin-out (J9A1) Signal Color GND of Pin 5 Black GND of Pin 6 Black GND of Pin 7 Black GND of Pin 8 Black +12 Vdc CPU1...
Page 170: Lcp / Ipmb Header
Connector/Header Locations and Pin-outs Intel® Server System SC5650HCBRP TPS ® ® Note: This connector is not compatible with the Intel Remote Management Module (Intel ® ® RMM) or the Intel Remote Management Module 2 (Intel RMM2). ® Table 99. Intel...
Page 171: Sgpio Header
Front Panel Connector ® The server board provides a 24-pin SSI front panel connector (J1B3) for use with Intel third-party chassis. The following table provides the pin-out for this connector. Table 103. Front Panel SSI Standard 24-pin Connector Pin-out (J1B3)
Page 172: Nic Connectors
Connector/Header Locations and Pin-outs Intel® Server System SC5650HCBRP TPS Table 104. VGA Connector Pin-out (J7A1) Signal Name Description V_IO_R_CONN Red (analog color signal R) V_IO_G_CONN Green (analog color signal G) V_IO_B_CONN Blue (analog color signal B) TP_VID_CONN_B4 No connection Ground...
Page 173: Sata Connectors
Positive side of receive differential pair Ground 8.5.4 SAS Module Slot ® The server board provides one SAS module slot (J2J1) to support the Intel SAS Entry RAID Module AXX4SASMOD card. The following table defines the pin-out. Table 107. SAS Module Slot Pin-out (J2J1) Name...
Page 174: Serial Port Connectors
Connector/Header Locations and Pin-outs Intel® Server System SC5650HCBRP TPS Name Name PE_ICH10_SAS_SW_RXP2 PE_ICH10_SAS_SW_RXN2 PE_ICH10_SAS_SW_RXP3 PE_ICH10_SAS_SW_RXN3 CLK_100M_SAS_DP CLK_100M_SAS_DN P3V3 P3V3 P3V3 8.5.5 Serial Port Connectors The server board provides one external DB9 Serial A port (J8A1) and one internal 9-pin Serial B header (J1B1).
Page 175: Usb Connector
Intel® Server System SC5650HCBRP TPS Connector/Header Locations and Pin-outs 8.5.6 USB Connector The following table details the pin-out of the external USB connectors (J5A1, J6A1) found on the back edge of the server boards. Table 110. External USB Connector Pin-out (J5A1, J6A1)
Page 176: Fan Headers
Connector/Header Locations and Pin-outs Intel® Server System SC5650HCBRP TPS One low-profile 2x5 connector (J2D2) on the server board provides an option to support a low- profile USB Solid State Drive. Table 113. Pin-out of Internal Low-Profile USB Connector for Solid State Drive (J2D2)
Page 177: Table 115. Ssi 4-Pin Fan Header Pin-Out (J7K1, J9A2, J9A3)
VLSI and power delivery components that need adequate airflow to cool. Intel’s own chassis are designed and tested to meet the intended thermal requirements of these components when the fully integrated system is used together. It is the responsibility of the ®...
Page 178: Jumper Blocks
Jumper Blocks Intel® Server System SC5650HCBRP TPS Jumper Blocks The server board has several 3-pin jumper blocks that you can use to configure, protect, or recover specific features of the server boards. The following symbol identifies Pin 1 on each jumper block on the silkscreen: ▼...
Page 179: Cmos Clear And Password Reset Usage Procedure
The CMOS Clear (J1E6) and Password Reset (J1E4) recovery features are designed to achieve the desired operation with minimum system down time. The usage procedure for these two ® features has changed from previous generation Intel server boards. The following procedure outlines the new usage model.
Page 180: Bios Recovery Jumper
Jumper Blocks Intel® Server System SC5650HCBRP TPS BMC into the proper update state. In the event the standard BMC firmware update process fails, complete the following procedure: 1. Power down and remove the AC power cord. 2. Open the server chassis. See your server chassis documentation for instructions.
Page 181 Intel® Server System SC5650HCBRP TPS Jumper Blocks 10. Move the BIOS recovery jumper (J1E5) from the “enabled” position (covering pins 2 and 3) to the “disabled” position (covering pins 1 and 2). 11. Close the server chassis. 12. Reconnect the AC power cord and power up the server.
Page 182: Intel Light Guided Diagnostics
® ® The Server Board in the Intel Server System SC5650HCBRP has several onboard diagnostic LEDs to assist in troubleshooting board-level issues. This section provides a description of the location and function of each LED on the server boards. 10.1 5-volt Stand-by LED Several server management features of these server boards require a 5-V stand-by voltage supplied from the power supply.
Page 183: 10.2 Fan Fault Led's
Intel® Server System SC5650HCBRP TPS Intel® Light Guided Diagnostics Figure 60. 5-volt Stand-by Status LED Location 10.2 Fan Fault LED’s Fan fault LEDs are present for the two CPU fans and the one rear system fan. The fan fault LEDs illuminate when the corresponding fan has fault.
Page 184: Figure 61. Fan Fault Led's Location
Intel® Light Guided Diagnostics Intel® Server System SC5650HCBRP TPS Figure 61. Fan Fault LED’s Location Revision 1.2 Intel order number E81443-002...
Page 185: 10.3 System Id Led And System Status Led
Intel® Server System SC5650HCBRP TPS Intel® Light Guided Diagnostics 10.3 System ID LED and System Status LED The server board provides LEDs for both system ID and system status. These LEDs are located in the rear I/O area of the server board as shown in the following figure.
Page 186: Table 118. System Status Led
Intel® Light Guided Diagnostics Intel® Server System SC5650HCBRP TPS By issuing the appropriate hex IPMI “Chassis Identify” value, the ID LED will either blink blue for 15 seconds and turn off or will blink indefinitely until the appropriate hex IPMI Chassis Identify value is issue to turn it off.
Page 187: 10.4 Dimm Fault Leds
Intel® Server System SC5650HCBRP TPS Intel® Light Guided Diagnostics 10.4 DIMM Fault LEDs The server board provides memory fault LED for each DIMM socket. These LEDs are located as shown in the following figure. The DIMM fault LED illuminates when the corresponding DIMM slot has memory installed and a memory error occurs.
Page 188: 10.5 Post Code Diagnostic Leds
Intel® Light Guided Diagnostics Intel® Server System SC5650HCBRP TPS 10.5 Post Code Diagnostic LEDs Eight amber POST code diagnostic LEDs are located on the back edge of the server boards in the rear I/O area of the server boards by the serial A connector.
Page 189: 11. Design And Environmental Specifications
5 Hz to 500 Hz 3.13 g RMS random Disclaimer Note: Intel Corporation server boards contain a number of high-density VLSI and power delivery components that need adequate airflow to cool. Intel ensures through its own ® chassis development and testing that when Intel server building blocks are used together, the fully integrated system will meet the intended thermal requirements of these components.
Page 190: Table 120. Mtbf Estimate
Design and Environmental Specifications Intel® Server System SC5650HCBRP TPS • Duty Cycle: 100% • Quality Level: II Table 120. MTBF Estimate MTBF (hours) Intel® Server System SC5650HCBRP 43600 Intel® Server Board S5520HC 124,000 600-W Power Supply Unit 356,000 Hot Swap Power Supply Power Distribution Board...
Page 191: 11.3 Processor Power Support
11.3 Processor Power Support ® ® The server boards support the Thermal Design Power (TDP) guideline for Intel Xeon processors. The Flexible Motherboard Guidelines (FMB) were also followed to determine the suggested thermal and current design values for anticipating future processor needs. The ®...
Page 192: 12. Regulatory And Certification Information
Product EMC Compliance – Class A Compliance ® The Intel Server System SC5650HCBRP has been tested and verified to comply with the ® following electromagnetic compatibility (EMC) regulations when installed a compatible Intel host system. For information on compatible host system(s) refer to http://support.intel.com/support/motherboards/server/S5520HC/...
Page 193: Certifications / Registrations / Declarations
Intel® Server System SC5650HCBRP TPS Regulatory and Certification Information • BSMI CNS13438 Emissions (Taiwan) • RRL Notice No. 1997-41 (EMC) & 1997-42 (EMI) (Korea) • GOST R 29216-91 Emissions (Russia) – Listed on System License • GOST R 50628-95 Immunity (Russia) – Listed on System License •...
Page 194: 12.2 Product Regulatory Compliance Markings
Regulatory and Certification Information Intel® Server System SC5650HCBRP TPS 12.2 Product Regulatory Compliance Markings Regulatory Compliance Country Marking UL Mark USA/Canada CE Mark Europe EMC Marking (Class A) Canada CANADA ICES-003 CLASS A CANADA NMB-003 CLASSE A BSMI Marking (Class A)
Page 195 Intel® Server System SC5650HCBRP TPS Regulatory and Certification Information This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
Page 196: Ices-003 (Canada)
Regulatory and Certification Information Intel® Server System SC5650HCBRP TPS ICES-003 (Canada) Cet appareil numérique respecte les limites bruits radioélectriques applicables aux appareils numériques de Classe A prescrites dans lanorme sur le matériel brouilleur: “Apparelis Numériques”, NMB-003 édictee par le Ministre Canadian des Communications.
Page 197: Rrl Kcc (Korea)
RRL KCC (Korea) 12.4 Product Ecology Change (EU RoHS) Intel has a system in place to restrict the use of banned substances in accordance with the European Directive 2002/95/EC. Compliance is based on declaration that materials banned in the RoHS Directive are either (1) below all applicable threshold limits or (2) an approved / pending RoHS exemption applies.
Page 198 Intel® Server System SC5650HCBRP TPS CRoHS Substance Tables: China CRoHS requires products to be provided with controlled substance information. Intel understands the end-seller (entity placing product into market place) is responsible for providing the controlled substance information. Controlled substance information is required to be in Simplified Chinese.
Page 199 Intel® Server System SC5650HCBRP TPS Regulatory and Certification Information Revision 1.2 Intel order number E81443-002...
Page 200: China Packaging Recycle Marks (Or Gb18455-2001)
The State of California requires a warning to be included for products containing a device using Lithium Perchlorate. Intel understands CA Lithium Perchlorate require a printed warning to be included with all products containing a Lithium battery, either as an insert, in existing product literature, or as part of the shipping memo wording.
Page 201: Appendix A: Integration And Usage Tips
F1 performs better than a 6-DIMM configuration with identical DIMMs at A1, A2, B1, B2, C1, and C2. ® ® The Intel RMM3 connector is not compatible with the Intel Remote Management ® Module (Product Code AXXRMM) or the Intel Remote Management Module 2 (Product Code AXXRMM2).
Page 202 Appendix A: Integration and Usage Tips Intel® Server System SC5650HCBRP TPS device SEL event, There are multiple means to dump the PCI map. For example, read the location number from the device general property page in device manager under Microsoft Windows* Operating Systems, or type ‘PCI’ and execute under the...
Page 203: Appendix B: Processor Active Heat Sink Installation
Active processor heat sink(s) is required Table 122. Compatible Heatsink Matrix Intel® Thermal Solution Intel® Thermal Solution STS100C (w/ fan, Active STS100A (Active) mode) Maximum CPU Power Support in Intel® Server System 95 W 80 W SC5650HCBRP Intel® Thermal Solution Product Code BXSTS100C BXSTS100A Note: Must install active processor heat sink with the airflow direction as shown in the following ®...
Page 204: Appendix C: Bmc Sensor Tables
Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables This appendix lists the sensor identification numbers and information about the sensor type, name, supported thresholds, assertion and de-assertion information, and a brief description of the sensor purpose.
Page 205 Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables T: Threshold value Rearm Sensors The rearm is a request for the event status of a sensor to be rechecked and updated upon a transition between good and bad states. You can rearm the sensors manually or automatically.
Page 206: Table 123. Integrated Bmc Core Sensors
Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Table 123. Integrated BMC Core Sensors Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- Sensor # Sensor Type System Rearm Value / Applicability...
Page 207 Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 208 Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 209 Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 210 Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 211 Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 212 Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 213 Intel® Server System SC5650HCBRP TPS Appendix C: BMC Sensor Tables Readable Contrib. To Full Sensor Name Event Platform Event / Event Offset Assert / Stand- System Sensor # Sensor Type Rearm Value / Applicability Reading Type Triggers De-assert (Sensor name in SDR)
Page 214 Appendix C: BMC Sensor Tables Intel® Server System SC5650HCBRP TPS Revision 1.2 Intel order number E81443-002...
Page 215: Appendix D: Platform Specific Bmc Appendix
Intel® Server System SC5650HCBRP TPS Appendix D: Platform Specific BMC Appendix Appendix D: Platform Specific BMC Appendix Table 124. Platform Specific BMC Features Intel® Server System SC5650HCBRP CPU 1 Fan Sensor #31 CPU 2 Fan Sensor #30 System Fan 1 Sensor #37...
Page 216: Appendix E: Post Code Diagnostic Led Decoder
Appendix E: POST Code Diagnostic LED Decoder Intel® Server System SC5650HCBRP TPS Appendix E: POST Code Diagnostic LED Decoder During the system boot process, the BIOS executes a number of platform configuration processes, each of which is assigned a specific hex POST code number. As each configuration routine is started, the BIOS displays the POST code to the POST Code Diagnostic LEDs on the back edge of the server board.
Page 217: Table 126. Post Codes And Messages
Intel® Server System SC5650HCBRP TPS Appendix E: POST Code Diagnostic LED Decoder Upper nibble bits = 1110b = Eh; Lower nibble bits = 1101b = Dh; the two are concatenated as EDh. Find the meaning of POST Code EDh in below table – Memory Population Error: RDIMMs and UDIMMs cannot be mixed in the system.
Page 218 Appendix E: POST Code Diagnostic LED Decoder Intel® Server System SC5650HCBRP TPS Progress Code Progress Code Definition 0x53-0x57 Reserved for PCI Bus 0x58 Resetting USB bus 0x59 Reserved for USB devices ATA / ATAPI / SATA 0x5A Resetting SATA bus and all devices...
Page 219 Intel® Server System SC5650HCBRP TPS Appendix E: POST Code Diagnostic LED Decoder Progress Code Progress Code Definition Removable Media 0xB8 Resetting the removable media device 0xB9 Disabling the removable media device 0xBA Detecting the presence of a removable media device (CDROM detection, etc.)
Page 220 Appendix E: POST Code Diagnostic LED Decoder Intel® Server System SC5650HCBRP TPS Progress Code Progress Code Definition 0x3F Unable to complete crisis recovery Revision 1.2 Intel order number E81443-002...
Page 221: Appendix F: Post Error Messages And Handling
Intel® Server System SC5650HCBRP TPS Appendix F: POST Error Messages and Handling Appendix F: POST Error Messages and Handling Whenever possible, the BIOS outputs the current boot progress codes on the video screen. Progress codes are 32-bit quantities plus optional data. The 32-bit numbers include class, subclass, and operation information.
Page 222: Table 127. Post Error Messages And Handling
Appendix F: POST Error Messages and Handling Intel® Server System SC5650HCBRP TPS Table 127. POST Error Messages and Handling Error Code Error Message Response 0012 CMOS date / time not set Pause 0048 Password check failed Pause 0108 Keyboard component encountered a locked error.
Page 223 Intel® Server System SC5650HCBRP TPS Appendix F: POST Error Messages and Handling Error Code Error Message Response 852A DIMM_F1 failed Self Test (BIST). Pause 852B DIMM_F2 failed Self Test (BIST). Pause 8540 DIMM_A1 Disabled. Pause 8541 DIMM_A2 Disabled. Pause 8542 DIMM_B1 Disabled.
Page 224 Appendix F: POST Error Messages and Handling Intel® Server System SC5650HCBRP TPS Error Code Error Message Response 9246 Mouse component encountered a controller error. No Pause 9266 Local Console component encountered a controller error. No Pause 9268 Local Console component encountered an output error.
Page 225: Table 128. Post Error Beep Codes
Intel® Server System SC5650HCBRP TPS Appendix F: POST Error Messages and Handling POST Error Beep Codes The following table lists the POST error beep codes. Prior to system video initialization, the BIOS uses these beep codes to inform users of error conditions. The beep code is followed by a user-visible code on the POST Progress LED’s.
Page 226: Appendix G: Installation Guidelines
No driver required under Sun Solaris* 2. Sun Solaris* 10 U5 (05/08) hangs during early boot when EHCI-2 is enabled Description Sun Solaris* 10 U5 may hang during early boot in the Intel® Server System SC5650HCBRP when USB 2.0 is Enabled Guideline Disable “USB 2.0 Controller”...
Page 227 EFI Shell. Description In an Intel Server System SC5650HCBRP based system with EFI shell as first boot device, after users ® press hot keys to enter RAID adapter configuration screen that hooks option ROM on INT 19h, the system may boot in to EFI shell instead.
Page 228: Glossary
Glossary Intel® Server System SC5650HCBRP TPS Glossary Term Definition ACPI Advanced Configuration and Power Interface AHCI Advanced Host Controller Interface Active Management Technology Application Processor APIC Advanced Programmable Interrupt Control Address Resolution Protocol ASIC Application Specific Integrated Circuit Address Translation Technology...
Page 229 Intel® Server System SC5650HCBRP TPS Glossary Term Definition Firmware Firmware Hub 1024 MB Guest Physical Address GPIO General Purpose I/O Host Physical Address Hot-Swap Controller Hyper-Threading Hertz (1 cycle / second) Inter-Integrated Circuit Bus Intel® Architecture I/O Controller Hub Independent Loading Mechanism...
Page 230 Glossary Intel® Server System SC5650HCBRP TPS Term Definition NUMA Non-Uniform Memory Access NVSRAM Non-volatile Static Random Access Memory Original Equipment Manufacturer Unit of electrical resistance OLTT Open-Loop Thermal Throttling Physical Address Extension Print Circuit Board Peripheral Component Interconnect PECI Platform Environment Control Interface...
Page 231 Intel® Server System SC5650HCBRP TPS Glossary Term Definition Technical Product Specification UART Universal Asynchronous Receiver / Transmitter UDIMM Unbuffered Dual In-Line Memory Module User Datagram Protocol UHCI Universal Host Controller Interface Unified Retention System Universal Serial Bus Universal time coordinate...
Page 232: Reference Documents
Intel® Server System SC5650HCBRP TPS Reference Documents Reference Documents See the following documents for additional information: ® ® Intel Server Boards S5520HC and S5500HCV, Intel Server System SC5650HCBRP Specification Update ® Intel Server Chassis SC5650 Technical Product Specification Update ®...

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