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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
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EVM IMPORTANT NOTICE Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation kit being sold by TI is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety measures typically found in the end product incorporating the goods.
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EVM schematic located in the EVM User’s Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments Post Office Box 655303 Dallas, Texas 75265 Copyright 2003, Texas Instruments Incorporated...
Chapter 1 Introduction This chapter gives a brief overview of the SN65LVDS122EVM and highlights the high-speed performance and functionality of the SN65LVDS122, 2x2 cross-point switch. Topic Page Overview ........... . .
2:1 MUX Figure 1–2 is a picture of the SN65LVDS122PW and EVM. The EVM part number is SN65LVDS122EVM. The EVM comes with the SN65LVDS122PW (TSSOP) installed. A copy of the data sheet is shipped with the EVM. The lastest version of the data sheet is available from www.ti.com.
Signal Paths 1.2 Signal Paths The signal paths on this EVM include eight edge-launch SMA connectors (J1–J8) for high-speed data transmission, two jumpers (W1, W2) for active switch logic control, two jumpers (W3, W4) for static switch logic control, one jumper (J9) for enabling and disabling the outputs, and three banana jacks (J10, J11, J12) for power and ground connections.
Chapter 2 Setup and Equipment Required This chapter describes the equipment, setup, and operation of the SN65LVDS122EVM. Topic Page Overview ........... . .
By using three power jacks (J10, J11, and J12), different methods of termination or probing the output characteristics can be observed without exceeding the common-mode drive capability. Figure 2–1 shows the typical setup for the SN65LVDS122EVM. Figure 2–1. EVM Power Connections for SN65LVDS122 Evaluation Power Supply #1 3.3 V...
Applying an Input 2.2 Applying an Input When using a general-purpose signal generator with 50-Ω output impedance, make sure that the signal levels are between 0 V and 4 V with respect to J12, device under test ground (DUT GND), designated as VEE. Inputs should be applied to the SMA connectors J1, J2, J5, and J6.
Observing an Output 2.3 Observing an Output When the SN65LVDS122 EVM is connected directly to an oscilloscope with 50–Ω internal terminations to ground; resistors R4, R5, R6, and R7 are not needed (the EVM is shipped without R4–R7 installed). All external cabling needs to be matched in length to prevent skew between inverting and noninverting signals and between channels.
400 mV with a common-mode voltage of 0 V (referenced to the ground of the pattern generator). Figure 2–4. Typical Test Results With the SN65LVDS122EVM Setup and Equipment Required...
Board Layout Patterns Figure 3–5. Layer 3 Split V amd V Figure 3–6. Layer 4 GND Plane Figure 3–7. PCB Fabrication Notes and Stackup Notes: 1) PWB to be fabricated to meet or exceed IPC-6012, Class 3 standards and workmanship conform to IPC-A-600, Class 3 current revisions 2) Board material and construction to be UL approved and marked on the finished board.
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