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The Texas Instruments SN65LVCP114 Evaluation Module (EVM) board is used to evaluate the
SN65LVCP114, 14.2Gbps Quad 1:2-2:1 Mux, Linear-Redriver with Signal Conditioning. This document
provides guidance on the device's proper use by showing some operating configurations and test modes.
The EVM board schematic and layout information are also provided for the customer. Information in this
guide assists the customer in choosing the optimal design methods and materials in designing a complete
system.
SLLU160 – December 2011
Submit Documentation Feedback
SN65LVCP114 Evaluation Module (EVM)
Copyright © 2011, Texas Instruments Incorporated
User's Guide
SLLU160 – December 2011
SN65LVCP114 Evaluation Module (EVM)
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Summary of Contents for Texas Instruments SN65LVCP114
- Page 1 SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) The Texas Instruments SN65LVCP114 Evaluation Module (EVM) board is used to evaluate the SN65LVCP114, 14.2Gbps Quad 1:2-2:1 Mux, Linear-Redriver with Signal Conditioning. This document provides guidance on the device's proper use by showing some operating configurations and test modes.
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Page 2: Table Of Contents
SN65LVCP114 EVM Schematic, USB Interface ................ SN65LVCP114 EVM PCB Layer Construction ............SN65LVCP114 Board Layout: Top Signal (Layer 1 of 6) ............SN65LVCP114 Board Layout: Internal Ground (Layer 2 of 6) ............SN65LVCP114 Board Layout: Internal Power (Layer 3 of 6) ............ -
Page 3: Contents 1 Introduction
QUAD 1:2-2:1 mux, linear-redriver switch with signal conditioning. The device linearly compensates for channel loss in backplane and active-cable applications. The architecture of the SN65LVCP114 crosspoint switch is designed to work effectively with ASIC or FPGA products implementing digital equalization by using decision feedback equalizer (DFE) technology. -
Page 4: Sn65Lvcp114 Evm Board Configuration
SN65LVCP114 EVM Board Configuration The SN65LVCP114 is operated from a 2.5-V or 3.3-V power supply with a 1.0 A or greater current rating. The SN65LVCP114 has three ports; each port has four lanes. The switch logic of the SN65LVCP114 is implemented to support 2:1 MUX per lane, 1:2 DEMUX per lane, and independent lane switching. -
Page 5: Test Setup
Figure 2. SN65LVCP114 EVM Jumper Description Test Setup The SN65LVCP114 EVM gives the developer two control interface options for operation, I2C or GPIO mode. Input and Output differential pairs are available through edge-launch SMAs with approximately 2.5 inches of trace with Rogers Low–Dielectric material with 0.1 µF AC Coupling capacitors. Power to the device, VCC, is applied using banana jacks (P1, P2). -
Page 6: I2C Mode
I2C Mode The I2C mode is implemented using the SN65LVCP114 user interface software included in the CD-ROM with the EVM. Refer to the SN65LVCP114 EVM GUI User’s Guide for details on how to use the GUI. Table 2 shows the appropriate jumper settings on the EVM to configure the device in I2C mode. Refer to Appendix A for jumper shunt settings. -
Page 7: Sn65Lvcp114 Evm Gpio Mode Settings
GPIO Mode www.ti.com Table 4. SN65LVCP114 EVM GPIO Mode Settings Ref Des Symbol GPIO Mode Pin Description JMP8 I2C_A0_EQA1 3 level control for EQ gain of port A JMP6 I2C_A1_EQB1 3 level control for EQ gain of port B JMP3... -
Page 8: Schematics
Schematics www.ti.com Schematics Figure 3. SN65LVCP114 EVM Schematic, Port A SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 9: Sn65Lvcp114 Evm Schematic, Port B
Schematics www.ti.com Figure 4. SN65LVCP114 EVM Schematic, Port B SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 10: Sn65Lvcp114 Evm Schematic, Port C
Schematics www.ti.com Figure 5. SN65LVCP114 EVM Schematic, Port C SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 11: Sn65Lvcp114 Evm Schematic, Controls_1
Schematics www.ti.com Figure 6. SN65LVCP114 EVM Schematic, Controls_1 SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 12: Sn65Lvcp114 Evm Schematic, Controls_2
Schematics www.ti.com Figure 7. SN65LVCP114 EVM Schematic, Controls_2 SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 13: Sn65Lvcp114 Evm Schematic, Controls_3
Schematics www.ti.com Figure 8. SN65LVCP114 EVM Schematic, Controls_3 SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 14: Sn65Lvcp114 Evm Schematic, Power Distribution
Schematics www.ti.com Figure 9. SN65LVCP114 EVM Schematic, Power Distribution SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 15: Sn65Lvcp114 Evm Schematic, Usb Interface
Schematics www.ti.com Figure 10. SN65LVCP114 EVM Schematic, USB Interface SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 16: Bill Of Materials
Bill of Materials www.ti.com Bill of Materials Table 5. SN65LVCP114 EVM Bill of Materials Reference Value Part Part Number Manufacturer C1–C12, C22, C29–C45 0.1 µF 0201 CAP LMK063BJ104KP-F Taiyo Yuden 47 µF 1210 CAP EMK325BJ476MM-T Taiyo Yuden 22 µF 1206 CAP... - Page 17 Bill of Materials www.ti.com Table 5. SN65LVCP114 EVM Bill of Materials (continued) Reference Value Part Part Number Manufacturer R81, R82 33 Ω 0402 RES RR0510R-330-D Susumu Co., Ltd. 1 MΩ 0402 RES RMCF0402FT1M00 STACKPOLE ELEC. INC. R85–R87, R91–R96 4.99 KΩ_DNI...
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Page 18: Board Layout
Board Layout www.ti.com Board Layout Figure 11. SN65LVCP114 EVM PCB Layer Construction NOTE: Always consult your board manufacturer for their process/design requirements to ensure the desired impedance is achieved. SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback... -
Page 19: Sn65Lvcp114 Board Layout: Top Signal (Layer 1 Of 6)
Board Layout www.ti.com Figure 12. SN65LVCP114 Board Layout: Top Signal (Layer 1 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 20: Sn65Lvcp114 Board Layout: Internal Ground (Layer 2 Of 6)
Board Layout www.ti.com Figure 13. SN65LVCP114 Board Layout: Internal Ground (Layer 2 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 21: Sn65Lvcp114 Board Layout: Internal Power (Layer 3 Of 6)
Board Layout www.ti.com Figure 14. SN65LVCP114 Board Layout: Internal Power (Layer 3 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 22: Sn65Lvcp114 Board Layout: Internal Signal (Layer 4 Of 6)
Board Layout www.ti.com Figure 15. SN65LVCP114 Board Layout: Internal Signal (Layer 4 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 23: Sn65Lvcp114 Board Layout: Internal Ground (Layer 5 Of 6)
Board Layout www.ti.com Figure 16. SN65LVCP114 Board Layout: Internal Ground (Layer 5 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 24: Sn65Lvcp114 Board Layout: Bottom Signal (Layer 6 Of 6)
Board Layout www.ti.com Figure 17. SN65LVCP114 Board Layout: Bottom Signal (Layer 6 of 6) SLLU160 – December 2011 SN65LVCP114 Evaluation Module (EVM) Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 25: Appendix A Jumper Shunt Settings
The table below shows the different shunt settings of the 3 and 4 pin jumpers on the EVM. Appendix B Typical Evaluation Setups Figure 18. Receive Side Use Case SLLU160 – December 2011 Jumper Shunt Settings Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... -
Page 26: Transmit Side Use Case
Appendix B www.ti.com Figure 19. Transmit Side Use Case Figure 20. Combined Bus Extension Use Case SLLU160 – December 2011 Typical Evaluation Setups Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated... - Page 27 Any exceptions to this are strictly prohibited and unauthorized by Texas Instruments unless user has obtained appropriate experimental/development licenses from local regulatory authorities, which is responsibility of user including its acceptable authorization.
- Page 28 FCC Interference Statement for Class B EVM devices This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications.
- Page 29 Also, please do not transfer this product, unless you give the same notice above to the transferee. Please note that if you could not follow the instructions above, you will be subject to penalties of Radio Law of Japan. Texas Instruments Japan Limited (address) 24-1, Nishi-Shinjuku 6 chome, Shinjuku-ku, Tokyo, Japan http://www.tij.co.jp...
- Page 30 FDA Class III or similar classification, then you must specifically notify TI of such intent and enter into a separate Assurance and Indemnity Agreement. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2012, Texas Instruments Incorporated...
- Page 31 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.
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