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AKM AKD4753-A Manual

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The AKD4753-A is an evaluation board for AK4753, 2-in, 4-out CODEC with DSP Functions. The
AKD4753-A has the Digital Audio I/F and can achieve the interface with digital audio systems via
optical connector.
■ Ordering guide
AKD4753-A --- Evaluation Board for AK4753
• RCA connectors for analog audio input/output
• Optical connector for digital audio input
• On-board digital audio interface (AK4118A)
• Potentiometers for Volume and Bass gain control
• USB connector for serial control interface
•1k bits EEPROM
Regulator
USB 3.3V
PIC4550
USB
PORT4
Opt In
PORT1
* Circuit diagram and PCB layout are attached at the end of this manual.
KM103902
GENERAL DESCRIPTION
(Control software and USB cable are packed with this.)
FUNCTION
D3.3V
EEPROM
AK4118A
(DIR)
10 Pin Header
DSP
PORT3
Figure 1. AKD4753-A Block Diagram
AK4753 Evaluation Board Rev.2
DVDD
AVDD
3.3V
AK4753
I2C
10 Pin Header
PORT2
- 1 -
[AKD4753-A]
AKD4753-A
+5V
GND
Regulator
AINL
AINR
LOUT1
ROUT1
ROUT2
LOUT1
SAIN1
Volume
SAIN2
Bass Gain
Potentiometer
2011/01

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  • Page 1 AK4753 Evaluation Board Rev.2 GENERAL DESCRIPTION The AKD4753-A is an evaluation board for AK4753, 2-in, 4-out CODEC with DSP Functions. The AKD4753-A has the Digital Audio I/F and can achieve the interface with digital audio systems via optical connector. ■ Ordering guide AKD4753-A --- Evaluation Board for AK4753 (Control software and USB cable are packed with this.)

  • Page 2: Evaluation Board Manual

    [AKD4753-A] Evaluation Board Manual ■ Operation sequence 1) Set up the power supply lines Name of Color of Default Used for Open / Connect jack jack Setting Regulator T2: Should be always connected When default AVDD, DVDD of AK4753, setting.
  • Page 3 [AKD4753-A] ■ Evaluation mode 1) External Slave Mode (a) Evaluation of D/A using DIR of AK4118A. <default> In case of AK4753 evaluation using AK4118A, it is necessary to correspond to audio interface format for AK4753 and AK4118A.Please use AK4118A in the master mode.
  • Page 4 [AKD4753-A] 2) External Master Mode (a) Evaluation of D/A using DIR of AK4118A. In case of AK4753 evaluation using AK4118A, it is necessary to correspond to audio interface format for AK4753 and AK4118A.Please use AK4118A in the slave mode. PORT1(RX) is used. Nothing should be connected to PORT3(DSP) and J7(MCKI).
  • Page 5 [AKD4753-A] 4) PLL Master Mode (a) All interface signals including master clock are fed externally. (a-1) Setup the MCKI. X1(X’Tal) or J7(MCKI) are used. Nothing should be connected to PORT1(RX). (a) When using X1(X’Tal) (b) When using J7(MCKI) AK4753-MCLK AK4753-MCLK Figure 7.
  • Page 6 [AKD4753-A] ■ EEP-ROM operation setting 1) When you write the setting from Control Soft to EEPR M. At this time, please fix the EXTEE switch (See Table to "L". Figure 9. Setting of EEP-ROM operation1 2) When you load the setting from EEPROM to AK4753 Please change the EXTEE switch (See Table 5) from "L...
  • Page 7 [AKD4753-A] ■ Jumper pins setting [JP1 (SAIN1)]: The selection of connection to SAIN1 pin. SHORT : Connection. (Default) OPEN : Unconnection. [JP2 (SAIN2)]: The selection of connection to SAIN2 pin. SHORT : Connection. (Default) OPEN : Unconnection. [JP8 (PC-SCL)]: The selection of SCL signal.
  • Page 8 [AKD4753-A] ■ DIR SW Setting Upper-side is “ON(H)” and lower-side is “OFF(L)”. [S3] (SW DIP-4): Mode setting for AK4118A. Name ON (“H”) OFF (“L”) Default OCKS0 AK4118A Master Clock Setting Table 3 OCKS1 DIF0 AK4118A Audio Interface Format Setting Table 4 DIF1 Table 2.
  • Page 9 ■ Control Port It is possible to control AKD4753-A via general USB port. Connect cable with the USB port on board and PC. Control software is packed with this board. The software operation sequence is included in the evaluation board manual.

  • Page 10: Analog Inputs

    [AKD4753-A] ■ Analog Input / Output Circuits 1) Analog Inputs (a) AINL, AINR AINR AINR (open) AINL AINL (open) Figure 12. Circuit diagram of AINL and AINR (b) SAIN1, SAIN2 SAIN1 AVDD (OPEN) SAIN2 (OPEN) Figure 13. Circuit diagram of SAIN1 and SAIN2...

  • Page 11: Analog Outputs

    [AKD4753-A] 2) Analog Outputs (a) STEREO Mode (Full-differential) TEST1 TEST3 LOUT1 ROUT2 LOUT+ ROUT- LOUT+ ROUT- (open) (open) (OPEN) (OPEN) TEST2 TEST4 ROUT1 LOUT2 LOUT- ROUT+ LOUT- ROUT+ (open) (open) (OPEN) (OPEN) Figure 14. Circuit diagram of STEREO Mode (b) 2.1-channel Mode...

  • Page 12: Control Soft Manual

    [AKD4753-A] Control Soft Manual ■ Evaluation Board and Control Soft Settings 1. Set an evaluation board properly. 2. Connect Evaluation board to PC with USB cable. USB control is recognized as HID (Human Interface Device) on the PC. When it can not be recognized correctly please Connect Evaluation board to PC with USB cable.

  • Page 13: Operation Overview

    [AKD4753-A] ■Operation Overview Function, register map and testing tool can be controlled by this control soft. These controls are selected by upper tabs. Buttons which are frequently used such as register initializing button “Write Default”, are located outside of the switching tab window.
  • Page 14 [AKD4753-A] ■ Tab Functions 1. [Function]: Function control This tab is for function control. Each operation is executed by the function buttons on the left side of the screen. Figure 18.Window of [Function] KM103902 2011/01 - 14 -...
  • Page 15 [AKD4753-A] 1-1. [Mode Setting]: Power Management and Signal Path Setting When [Mode Setting] button is clicked, the window as shown in opens. This window is for Power Management and Signal Path Setting. Refer to the datasheet for register settings of the AK4753.

  • Page 16: Register Map

    [AKD4753-A] 1-3. [Volume Setting]: Volume Setting When [Volume Setting] button is clicked, the window as shown in opens. This window is for Volume Setting. Refer to the datasheet for register settings of the AK4753. Figure 21. Window of [Volume Setting] 1 -3-1.
  • Page 17 [AKD4753-A] 1-4. [Digital Filter Setting]: Filter Setting A calculation of a coefficient of Digital Programmable Filters such as HPF / LPF and EQ filters, a register writing and a frequency response checking of HPF / LPF and EQ filters can be made.

  • Page 18: Parameter Setting

    [AKD4753-A] 1-4-1. Parameter Setting (1) Please set a parameter of each Filter. Parameter Function Setting Range Sampling Rate Sampling frequency (fs) 7350Hz ≤ fs ≤ 48000Hz Cut Off Frequency 1.042x10 ≤ fc/fs ≤ 0.24 High pass filter cut off frequency...
  • Page 19 [AKD4753-A] 1-4-2. A calculation of a register A register set value is displayed when push a [Register Setting] button. When a value out of a setting range is set, error message is displayed, and a calculation of register setting is not carried out.
  • Page 20 [AKD4753-A] 1-4-3. Indication of a frequency characteristic A frequency characteristic is displayed when push a [F Response] button. Then, a register set point is also updated. Change "Frequency Range", and indication of a frequency characteristic is updated when push a [UpDate] button.

  • Page 21: Filter Setting

    [AKD4753-A] 1-4-4. Filter Setting The filter setting can be executed by dragging the number to 1-5 in the mouse. Band Width can be adjusted in the operation of Center Frequency and Gain right-clicking in the operation of the left-click. After it moves, a set value is reflected.
  • Page 22 [AKD4753-A] 1-5. [Limiter Setting]: Limiter Setting When [Limiter Setting] button is clicked, the window as shown in opens. This window is for Limiter Setting. Refer to the datasheet for register settings of the AK4753. Figure 29. Window of [Limiter Setting]...

  • Page 23: Reg]: Register Map

    [AKD4753-A] 2. [REG]: Register Map This tab is for a register writing and reading. Each bit on the register map is a push-button switch. Button Down indicates “H” or “1” and the bit name is in red (when read only it is in deep red).
  • Page 24 [AKD4753-A] 2-1. [Write]: Data Writing Dialog It is for when changing two or more bits on the same address at the same time. Click [Write] button located on the right of the each corresponded address for a pop-up dialog box.

  • Page 25: Tool]: Testing Tools

    [AKD4753-A] 3. [Tool]: Testing Tools This tab screen is for evaluation testing tool. Click buttons for each testing tool. Figure 32. Window of [Tool] KM103902 2011/01 - 25 -...
  • Page 26 [AKD4753-A] 3-1. [Repeat Test]: Repeat Test Dialog Click [Repeat Test] button to open repeat test setting dialog box. Figure 33. Window of [Repeat Test] 3-2. [Loop Setting]: Loop Setting Dialog Click [Loop Setting] button to open loop setting dialog box.

  • Page 27: All Reg Write]: All Register Write

    [AKD4753-A] ■Dialog Boxes 1. [All Reg Write]: ALL Register Write Click [All Reg Write] button in the main window to open register setting files. Register setting files saved by [SAVE] button can be applied. Figure 35. Window of [All Reg Write] [Open (left)] : Selecting a register setting file (*.akr).

  • Page 28: Data R/W]: Data Read/Write

    [AKD4753-A] 2. [Data R/W]: Data Read/Write Click the [Data R/W] button in the main window for data read/write dialog box. Data write is available to specified address. Figure 36. Window of [Data R/W] Address Box : Input data address in hexadecimal numbers for data writing.

  • Page 29: Sequence Setting

    [AKD4753-A] 3. [Sequence]: Sequence Click [Sequence] button to open register sequence setting dialog box. Register sequence can be set in this dialog box. Figure 37. Window of [Sequence] 3-1. Sequence Setting Set register sequence by following process bellow. (1)Select a command Use [Select] pull-down box to choose commands.

  • Page 30: Control Buttons

    [AKD4753-A] (2)Input sequence [Address] : Data address [Data] : Writing data [Mask] : Mask [Data] box data is ANDed with [Mask] box data. This is the actual writing data. When Mask = 0x00, current setting is hold. When Mask = 0xFF, the 8bit data which is set in the [Data] box is written.
  • Page 31 [AKD4753-A] 4. [Sequence(File)] : Sequence(File) Click [Sequence(File)] button to open sequence setting file dialog box. Those files saved in the “Sequence setting dialog” can be applied in this dialog. Figure 38. Window of [Sequence(File)] [Open (left)] : Opening a sequence setting file (*.aks).

  • Page 32: Eeprom] : Write

    [AKD4753-A] 5. [EEPROM] : Write Press the [EEPROM Write] button. Register setting wrings to EEPROM. The following messages are displayed according to the result of processing. ・Writing failure Figure 40. Window of [Writing failure] ・Writing success Figure 41. Window of [Writing success]...

  • Page 33: Measurement Result

    [AKD4753-A] Measurement Result [Measurement condition] • Measurement Unit : Audio Precession System Two Cascade • MCLK : 11.2896MHz (DAC) 12.288MHz (ADC to DAC) • BICK : 64fs • fs : 44.1kHz • Power Supply : AVDD=DVDD=3.3V • Band Width : 22Hz ~ 22kHz •...
  • Page 34 [AKD4753-A] 2. ADC to DAC a). Single-ended, LOUT1/ROUT1, LOUT2/ROUT2 R =Open Result Result Parameter Unit Lch1 Rch1 Lch2 Rch2 S/(N+D) 86.4 86.3 86.5 86.3 (-1dBFS Input) D-Range 95.1 95.0 95.1 95.0 (-60dB Input, A-weighted) 95.1 95.0 95.1 95.0 (No Signal, A-weighted) b).
  • Page 35 [AKD4753-A] PLOT DATA 1-a). DAC Single-ended [LOUT1/ROUT1 pins] AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz 0dBFS Input, External Slave Mode -100 -110 -120 -130 -140 Figure 42. FFT(0dBFS Input) AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, -60dBFS Input, External Slave Mode -100 -110 -120...
  • Page 36 [AKD4753-A] AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, No Signal, External Slave Mode -100 -110 -120 -130 -140 Figure 44. FFT(No Signal) AK4753 THD+N vs. Input Level [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, External Slave Mode -100 -105 -110 -115 -120 -140 -120 -100 dBFS Figure 45.
  • Page 37 [AKD4753-A] AK4753 THD+N vs. Input Frequency [LOUT1/ROUT1] fs=44.1kHz, 0dBFS Input, External Slave Mode -100 -105 -110 -115 -120 Figure 46. THD+N vs. Input Frequency AK4753 Linearity [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, EXT Slave Mode -100 -110 -120 -130 -140 -140 -130 -120...
  • Page 38 [AKD4753-A] AK4753 Frequency Response [LOUT1/ROUT1] fs=44.1kHz, 0dBFS Input, External Slave Mode +0.8 +0.6 +0.4 +0.2 -0.2 -0.4 -0.6 -0.8 Figure 48. Frequency Response AK4753 Crosstalk [LOUT1/ROUT1] fs=44.1kHz, 0dBFS Input, External Slave Mode -100 -110 -120 -130 -140 Figure 49. Crosstalk...
  • Page 39 [AKD4753-A] PLOT DATA 1-b). DAC Differential [LOUT/ROUT pins] AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, 0dBFS Input, External Slave Mode -100 -110 -120 -130 -140 Figure 50. FFT(0dBFS Input) AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, -60dBFS Input, External Slave Mode -100 -110 -120...
  • Page 40 [AKD4753-A] AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, No Signal, External Slave Mode -100 -110 -120 -130 -140 Figure 52. FFT(No Signal) AK4753 THD+N vs. Input Level [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, External Slave Mode -100 -105 -110 -115 -120 -140 -120 -100 dBFS Figure 53.
  • Page 41 [AKD4753-A] AK4753 THD+N vs. Input Frequency [LOUT+-/ROUT+-] fs=44.1kHz, 0dBFS Input, External Slave Mode -100 -105 -110 -115 -120 Figure 54. THD+N vs. Input Frequency AK4753 Linearity [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, EXT Slave Mode -100 -110 -120 -130 -140 -140 -130 -120...
  • Page 42 [AKD4753-A] AK4753 Frequency Response [LOUT+-/ROUT+-] fs=44.1kHz, 0dBFS Input, External Slave Mode +0.8 +0.6 +0.4 +0.2 -0.2 -0.4 -0.6 -0.8 Figure 56. Frequency Response AK4753 Crosstalk [LOUT+-/ROUT+-] fs=44.1kHz, 0dBFS Input, External Slave Mode -100 -110 -120 -130 -140 Figure 57. Crosstalk...
  • Page 43 [AKD4753-A] PLOT DATA 2-a). ADC to DAC Single-ended [LOUT1/ROUT1 pins] AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, -1dBFS Input -100 -110 -120 -130 -140 Figure 58. FFT(-1dBFS Input) AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, -60dBFS Input -100 -110 -120 -130 -140 Figure 59. FFT(-60dBFS Input)
  • Page 44 [AKD4753-A] AK4753 FFT [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz, No Signal -100 -110 -120 -130 -140 Figure 60. FFT(No Signal) AK4753 THD+N vs. Input Level [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz -100 -105 -110 -115 -120 -140 -120 -100 Figure 61. THD+N vs. Input Level KM103902...
  • Page 45 [AKD4753-A] AK4753 THD+N vs. Input Frequency [LOUT1/ROUT1] fs=44.1kHz, -1dBFS Input -100 -105 -110 -115 -120 Figure 62. THD+N vs. Input Frequency AK4753 Linearity [LOUT1/ROUT1] fs=44.1kHz, fin=1kHz -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 Figure 63. Linearity KM103902...
  • Page 46 [AKD4753-A] AK4753 FrequencyResponse [LOUT1/ROUT1] fs=44.1kHz, -1dBFS Input -0.2 -0.4 -0.6 -0.8 -1.2 -1.4 -1.6 -1.8 -2.2 -2.4 -2.6 -2.8 Figure 64. Frequency Response AK4753 Crosstalk [LOUT1/ROUT1] fs=44.1kHz, -1dBFS Input T T T T T T T T -100 -110 -120...
  • Page 47 [AKD4753-A] PLOT DATA 2-b). ADC to DAC Differential [LOUT/ROUT pins] AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, -1dBFS Input -100 -110 -120 -130 -140 Figure 66. FFT(-1dBFS Input) AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, -60dBFS Input -100 -110 -120 -130 -140 Figure 67. FFT(-60dBFS Input)
  • Page 48 [AKD4753-A] AK4753 FFT [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz, No Signal -100 -110 -120 -130 -140 Figure 68. FFT(No Signal) AK4753 THD+N vs. Input Level [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz -100 -105 -110 -115 -120 -140 -120 -100 Figure 69. THD+N vs. Input Level KM103902...
  • Page 49 [AKD4753-A] AK4753 THD+N vs. Input Frequency [LOUT+-/ROUT+-] fs=44.1kHz, -1dBFS Input -100 -105 -110 -115 -120 Figure 70. THD+N vs. Input Frequency AK4753 Linearity [LOUT+-/ROUT+-] fs=44.1kHz, fin=1kHz -100 -110 -120 -130 -140 -140 -130 -120 -110 -100 Figure 71. Linearity KM103902...
  • Page 50 [AKD4753-A] AK4753 FrequencyResponse [LOUT+-/ROUT+-] fs=44.1kHz, -1dBFS Input -0.2 -0.4 -0.6 -0.8 -1.2 -1.4 -1.6 -1.8 -2.2 -2.4 -2.6 -2.8 Figure 72. Frequency Response AK4753 Crosstalk [LOUT+-/ROUT+-] fs=44.1kHz, -1dBFS Input -100 -110 -120 -130 -140 Figure 73. Crosstalk KM103902 2011/01 - 50 -...

  • Page 51: Revision History

    AKM assumes no responsibility for any losses incurred by you or third parties arising from the use of these information herein. AKM assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of such information contained herein.
  • Page 52 LOUT2 SAIN2 LOUT2 (open) (open) VSS1 (OPEN) (OPEN) (OPEN) (OPEN) VSS1 Title Title Title AKD4753-A AKD4753-A AKD4753-A Size Size Size Document Number Document Number Document Number AIN / AOUT AIN / AOUT AIN / AOUT - 52 - Date: Date:...
  • Page 53 2.2u TEST31 TEST31 12.288MHz 12.288MHz DVDD EXTEE 44pin_4 44pin_4 VSS2 VSS2 VSS2 Title Title Title - 53 - AKD4753-A AKD4753-A AKD4753-A Size Size Size Document Number Document Number Document Number AK4753 AK4753 AK4753 Date: Date: Date: Wednesday, September 29, 2010...
  • Page 54 JP17 JP17 2DIR D3.3V D3.3V VCCA VCCB 0.1u 0.1u 0.1u 0.1u Title Title Title 74AVC4T245 74AVC4T245 AKD4753-A AKD4753-A AKD4753-A - 54 - Size Size Size Document Number Document Number Document Number DIR (AK4118) DIR (AK4118) DIR (AK4118) DGND Date: Date:...
  • Page 55 DVDD DVDD EXTEE BYPASS SW DIP-2 SW DIP-2 EEPROM 2.2k 2.2k 2.2k 2.2k 0.1u 0.1u D3.3V DGND EESCL PC-SCL PC-SCL PC-SCL EESDA 24LC01B 24LC01B JP10 JP10 PC-SDA PC-SDA PC-SDA DGND USB-VDD DGND DGND SILK-SCREEN 0.1u 0.1u 0.1u 0.1u 4.7k 4.7k 1: VDD 2: MCLR JP11...
  • Page 56 JP15 JP15 VSS1 D3.3V D3.3V (short) (short) DGND D3.3V TJ-563 (BLACK) TJ-563 (BLACK) DGND DGND Title Title Title AKD4753-A AKD4753-A AKD4753-A - 56 - Size Size Size Document Number Document Number Document Number POWER POWER POWER Date: Date: Date: Wednesday, September 29, 2010...
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