Analog Devices EVAL-AD7715-5EB Instructions Manual page 4

EVAL-AD7715-5EB
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36
1 NC No Connect. This pin is not connected on the evaluation board.
2 DIN Serial Data Input. Data applied to this pin is buffered before being applied to the AD7715's DIN pin. The
serial data applied to the DIN pin is written to the input shift register on the part. Data from this input shift
register is transferred to the communications register or setup register depending on the register selection
bits of the Communications Register.
3 RESET Reset Input. The signal on this pin is buffered before being applied to the RESET pin of the AD7715.
RESET is an active low input which resets the control logic, interface logic, calibration coefficients, digital
filter and analog modulator of the part to power-on status.
4 CS Chip Select. The signal on this pin is buffered before being applied to the CS pin of the AD7715. CS is an
active low logic input used to select the AD7715. With this input hard-wired low, the AD7715 operates in its
three-wire interface mode with SCLK, DIN and DOUT used to interface to the device. CS can be used to
select the device in systems with more than one device on the serial bus or as a frame synchronisation signal
in communicating with the AD7715.
5 SCLK Serial Clock. The signal on this pin is buffered before being applied to the SCLK pin of the AD7715. An
external serial clock is applied to this input to access serial data from the AD7715. This serial clock can be a
continuous clock with all data transmitted in a continuous train of pulses. Alternatively, it can be a non-con-
tinuous clock with the information being transmitted to the AD7715 in smaller batches of data.
6-8 NC No Connect. These pins are not connected on the evaluation board.
9 DV Digital Supply Voltage. This provides the supply voltage for IC4, the buffer chip which buffers the output
DD
signals from the AD7715 before they are applied to SKT2.
10 DRDY Logic output. This is a buffered version of the signal on the AD7715's DRDY pin. A logic low on the DRDY
output indicates that a new output word is available from the AD7715 data register. The DRDY pin will
return high upon completion of a read operation of a full output word. If no data read has taken place, after
an output update, the DRDY line will return high for 500* t
This gives an indication of when a read operation should not be attempted to avoid reading from the data
register as it is being updated. DRDY is also used to indicate when the AD7715 has completed its on-chip
calibration sequence.
11-12 NC No Connect. These pins are not connected on the evaluation board.
13 DOUT Serial Data Output. This is a buffered version of the signal on the AD7715's DOUT pin. Serial data from
the output shift register on the part is clocked out on this pin. This output shift register can contain informa-
tion from the communications register, setup register or data register depending on the register selection bits
of the Communications Register.
14-18 NC No Connect. These pins are not connected on the evaluation board.
19-30 DGND Ground reference point for digital circuitry. Connects to the DGND plane on the evaluation board.
31-36 NC No Connect. These pins are not connected on the evaluation board.
Figure 3. SKT2 Pin Configuration
Table III. SKT2 Pin Designations
–4–
cycles prior to the next output update.
CLK IN
1
19
REV. A