I2C Own Address Register 2 (I2C_Oaddr2); I2C Data Register (I2C_Dat) - Nations N32G43 Series User Manual

Bit field Name
7:1 ADDR[7:1]
0 ADDR0

I2C Own address register 2 (I2C_OADDR2)

Address offset: 0x0C
Reset value: 0x0000
Bit field Name
15:8 Reserved
7:1 ADDR2[7:1]
0 DUALEN

I2C Data register (I2C_DAT)

Address offset: 0x10
Reset value: 0x0000
Bit field Name
15:8 Reserved
7:0 DATA[7:0]
Description
Interface address
7~1 bits of the address.
Interface address
0 bit of the address.
Note: don't care these bits in 7-bit address mode
Description
Reserved, the reset value must be maintained.
Interface address
7~1 bits of address in dual address mode.
Dual addressing mode enable
0: Disable dual address mode, only OADDR1 is recognized;
1: Enable dual address mode, both OADDR1 and OADDR2 are recognized.
Note: Valid only for 7-bit address mode
Description
Reserved, the reset value must be maintained.
8-bit data register
Send or receive data buffer.
Note: In the slave mode, the address will not be copied into the data register;
Note: if I2C_STS1.TXDATE =0, data can still be written into the data register;
Note: If the ARLOST event occurs when processing the ACK pulse, the received byte will not be
copied into the data register, so it cannot be read.
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