Flow Control; Table 7-2 Flow Control Table - Nations N32G43 Series User Manual

3. Configure channel priority, 0: lowest, 3: highest.
4. Configure peripheral and memory address increment.
5. Configure channel transfer block size.
6. If necessary, configure circular mode.
7. If it is memory to memory, configure MEM2MEM mode (Note: to configure DMA to work in M2M mode, user
needs to set corresponding channel select value to reserved value, e.g., 63).
8. Repeat step 1~8 on channel 1~8 and finally.
9. Enable corresponding channel.
If software is used to serve interrupt, software must enquire interrupt status register to check which interrupt occurred
(software needs to write 1 to interrupt flag clear bit to clear the corresponding interrupt). Before enable channel, all
interrupts corresponding to the channel should be cleared.
If the interrupt is transfer complete interrupt, software can configure the next transfer, or report to user this channel
transformation is done.

Flow control

Three major flow controls are supported:
 Memory to memory
 Memory to peripheral
 Peripheral to memory
Flow control is controlled by two register bits in each DMA channel configuration register. Flow control is used to
control source/destination and direction of DMA channel.
DMA_CHCFGx.MEM2MEM DMA_CHCFGx.DIR
1
0
0

Table 7-2 Flow control table

Source
x Memory
1 Memory
AHB
0
Peripheral
138 / 631
Destination
AHB read to AHB write, can do back2back
Memory
AHB
AHB read to AHB write, single transfer
Peripheral
APB
AHB read to APB write, single transfer
Peripheral
Memory AHB read to AHB write, single transfer
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