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Data Allocation - M-system R7D-YV2/UL Instruction Manual

Dc voltage output module, 2 points (devicenet)

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DATA ALLOCATION

'Begin' address is determined by the R7D's node address and the master setting.
• Example 1. Analog Output Module + R7D-EA16, without Status
Output Data
Begin +0
R7D-EA16
• Example 2. Analog Output Module + R7D-EC16x, with Status
Output Data
Begin +0
Status
I/O DATA DESCRIPTIONS
ANALOG OUTPUT
15
16-bit binary data
Negative values represented in 2's complements
DISCRETE I/O
15
0 : OFF
1 : ON
SEN TRONIC
Begin +0
Analog Output Module
+1
Begin +0
Analog Output Module
+1
+2
R7D-EC16x
0
0
Input 0 (Output 0)
Input 1 (Output 1)
Input 2 (Output 2)
Input 3 (Output 3)
:
:
Input 7 (Output 7)
Input 8 (Output 8)
:
:
Input 15 (Output 15)
056 222 38 18
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AG
Input Data
CH0
CH1
Input Data
CH0
CH1
8 points
16 points
EM-7802-D Rev.6 P. 5 / 10
www.sentronic.com
R7D-YV2

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R7d-yv2R7 series