DIGITAL-LOGIC AG
I/O Map
Continued...
I/O Addr.
Function
0CCh
Master DMA Address - Channel 7
0CDh
No Specific Usage
0CEh
Master DMA Counter - Channel 7
0CFh
No Specific Usage
0D0h
Master DMA Command/Status – Channels [7:4]
0D1h
No Specific Usage
0D2h
Master DMA Request - Channels [7:4]
0D3h
No Specific Usage
0D4h
Master DMA Mask - Channels [7:4]
0D5h
No Specific Usage
0D6h
Master DMA Mode - Channels [7:4]
0D7h
No Specific Usage
0D8h
Master DMA Clear Pointer - Channels [7:4]
0D9h
No Specific Usage
0DAh
Master DMA Reset - Channels [7:4]
0DBh
No Specific Usage
0DCh
Master DMA Reset Mask - Channels [7:4]
0DDh
No Specific Usage
0DEh
Master DMA General Mask - Channels [7:4]
0DFh
No Specific Usage
0E0h-2E7h No Specific Usage
2E8h-2EFh UART/IR - COM4
2F0h-2F7h No Specific Usage
2F8h-2FFh UART/IR - COM2
300h- 36Fh No Specific Usage
370h
Floppy Status R A
371h
Floppy Status R B
372h
Floppy Digital Out
373h
No Specific Usage
374h
Floppy Cntrl Status
375h
Floppy Data
376h
No Specific Usage
377h
Floppy Conf Reg
378h-3E7h No Specific Usage
3E8h-3EFh UART/IR - COM3
3F0h
Floppy Status R A
Continued...
MSB900/L Detailed Technical Manual V1.0
Size
R/W Comment
8bit
Yes 16bit values in two transfers.
8bit
---
8bit
Yes 16bit values in two transfers.
8bit
---
8bit
Shw$
8bit
---
8bit
WO
8bit
---
8bit
Yes
8bit
---
8bit Shw@
8bit
---
8bit
WO
8bit
---
8bit
WO
8bit
---
8bit
WO
8bit
---
8bit Shw@
8bit
---
---
---
MSR bit enables/disables into I/O
2EFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
8bit
---
51400014h[22:20]). Defaults to
LPC.
---
---
MSR bit enables/disables into I/O
2FFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
8bit
---
51400014h[22:20]). Defaults to
LPC.
---
---
8bit
RO Second Floppy.
8bit
RO Second Floppy.
8bit Shw@ Second Floppy.
8bit
---
8bit
RO Second Floppy.
8bit
Yes Second Floppy.
8bit
---
8bit
Shw$ Second Floppy.
---
---
MSR bit enables/disables into I/O
3EFh space. (UART1 MSR
51400014h[18:16], UART2 MSR
8bit
---
51400014h[22:20]). Defaults to
LPC.
8bit
RO First Floppy.
38
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