Table 2-3. 40-Pin Edp Header Pin-Out - Intel Thin Mini-ITX System Design Manual

Table 2-3. 40-pin eDP Header Pin-Out

Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
18
Signal Name
NC_Reserved
High-speed_GND
Lane3_N (DDPD_[3]N)
Lane3_P (DDPD_[3]P)
High-speed_GND
Lane2_N (DDPD_[2]N)
Lane2_P (DDPD_[2]P)
High-speed_GND
Lane1_N (DDPD_[1]N)
Lane1_P (DDPD_[1]P)
High-speed_GND
Lane0_N (DDPD_[0]N)
Lane0_P (DDPD_[0]P)
High-speed_GND
AUX_CH_P (DDPD_AUXP)
AUX_CH_N (DDPD_AUXN)
High-speed_GND
LCD_VCC (3.3V/5V/12V)
LCD_VCC (3.3V/5V/12V)
LCD_VCC (3.3V/5V/12V)
Thin Mini-ITX Internal Electrical Interfaces
Pin
21 LCD_VCC (3.3V/5V/12V)
22 LCD_Self_Test-or-NC
23 LCD_GND
24 LCD_GND
25 LCD_GND
26 LCD_GND
27 HPD (DDPD_HPD)
28 BKLT_GND
29 BKLT_GND
30 BKLT_GND
31 BKLT_GND
32 BKLT_ENABLE
33 BKLT_PWM_DIM
34 NC_Reserved
35 NC_Reserved
36 BKLT_PWR (12V/19V)
37 BKLT_PWR (12V/19V)
38 BKLT_PWR (12V/19V)
39 BKLT_PWR (12V/19V)
40 NC_Reserved
Thin Mini-ITX Based PC System Design Guide
Signal